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参数资料
| 型号： | HSP50216KIZ |
| 厂商： | Intersil |
| 文件页数： | 58/58页 |
| 文件大小： | 0K |
| 描述： | IC DOWNCONVERTER DGTL 4CH 196BGA |
| 标准包装： | 1 |
| 功能： | 降频器 |
| RF 型： | W-CDMA |
| 封装/外壳： | 196-LFBGA |
| 包装： | 托盘 |
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HSP50216
Plastic Ball Grid Array Packages (BGA)
o
A1 CORNER
A1 CORNER I.D.
D
A
V196.12x12
196 BALL PLASTIC BALL GRID ARRAY PACKAGE
INCHES
MILLIMETERS
SYMBOL
A
MIN
-
MAX
0.059
MIN
-
MAX
1.50
NOTES
-
TOP VIEW
E
B
A1
A2
b
D/E
D1/E1
N
0.012
0.037
0.016
0.468
0.405
196
0.016
0.044
0.020
0.476
0.413
0.31
0.93
0.41
11.90
10.30
0.41
1.11
0.51
12.10
10.50
196
-
-
7
-
-
-
e
0.032 BSC
0.80 BSC
-
0.15
0.006
M C A B
MD/ME
14 x 14
14 x 14
3
0.08
0.003
M C
b
D1
14 13 12 11 10 9 8 7 6 5 4 3 2 1
A1
CORNER
A1
CORNER I.D.
bbb
aaa
0.004
0.005
0.10
0.12
-
-
Rev. 2 12/00
A
NOTES:
S
B
C
D
E
F
1. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
2. Dimensioning and tolerancing conform to ASME Y14.5M-1994.
G
H
J
E1
3. “MD” and “ME” are the maximum ball matrix size for the “D”
and “E” dimensions, respectively.
A
K
L
M
N
P
e
4. “N” is the maximum number of balls for the specific array size.
5. Primary datum C and seating plane are defined by the spher-
ical crowns of the contact balls.
6. Dimension “A” includes standoff height “A1”, package body
thickness and lid or cap height “A2”.
S
A
ALL ROWS AND COLUMNS
7. Dimension “b” is measured at the maximum ball diameter,
parallel to the primary datum C.
A1
A2
BOTTOM VIEW
bbb C
8. Pin “A1” is marked on the top and bottom sides adjacent to A1.
9. “S” is measured with respect to datum’s A and B and defines
the position of the solder balls nearest to package center-
lines. When there is an even number of balls in the outer row
the value is “S” = e/2.
C
aaa C
A
SEATING PLANE
SIDE VIEW
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
58
FN4557.6
August 17, 2007
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