参数资料
型号: IP-FIR
厂商: Altera
文件页数: 18/76页
文件大小: 0K
描述: IP FIR COMPILER
标准包装: 1
系列: *
类型: MegaCore
功能: 有限脉冲响应编译器
许可证: 初始许可证
2–4
Chapter 2: Getting Started
MegaWizard Plug-In Manager Flow
Figure 2–3. IP Toolbench—Parameterize
2. Click Step 2: Setup Simulation in IP Toolbench to display the Set Up Simulation -
FIR Compiler page ( Figure 2–4 ).
Figure 2–4. Set Up Simulation
3. Turn on Generate Simulation Model to create an IP functional model.
1
An IP functional simulation model is a cycle-accurate VHDL or Verilog
HDL model produced by the Quartus II software.
? May 2011 Altera Corporation
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