参数资料
型号: IP-FIR
厂商: Altera
文件页数: 8/76页
文件大小: 0K
描述: IP FIR COMPILER
标准包装: 1
系列: *
类型: MegaCore
功能: 有限脉冲响应编译器
许可证: 初始许可证
1–4
Precision control of chip resource utilization:
Chapter 1: About the FIR Compiler
Release Information
Logic cells, M512, M4K, M-RAM, MLAB, M9K, or M144K for data storage.
M512, M4K, M9K, M20K, MLAB or logic cells for coefficient storage.
Includes a resource estimator.
Support for run-time coefficient reloading capability and multiple coefficient sets.
Includes a built-in coefficient generator to enable efficient design space
exploration.
User-selectable output precision via rounding and saturation.
DSP Builder ready.
Release Information
Table 1–2 provides information about this release of the Altera ? FIR Compiler.
Table 1–2. FIR Compiler Release Information
Version
Release Date
Ordering Code
Product ID
Vendor ID
Item
Description
11.0
May 2011
IP-FIR
0012
6AF7
f
For more information about this release, refer to the MegaCore IP Library Release Notes
Altera verifies that the current version of the Quartus ? II software compiles the
previous version of each MegaCore ? function. The MegaCore IP Library Release Notes
and Errata report any exceptions to this verification. Altera does not verify
compilation with MegaCore function versions older than one release.
? May 2011 Altera Corporation
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