参数资料
| 型号： | IP-SRAM/QDRII |
| 厂商： | Altera |
| 文件页数： | 42/68页 |
| 文件大小： | 0K |
| 描述： | IP QDRII SRAM CONTROLLER |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | QDRII SRAM 控制器 |
| 许可证： | 初始许可证 |
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OpenCore Plus Time-Out Behavior
Figure 3–6. Timing Diagram of the IOE
cqn
cq
I/O A[7:0]
Expected B[7:0]
Real B[7:0]
Usable
part of B[7:0]
00
00
00
00
01
01
01
01
02
02
02
02
03
03
03
03
Delayed cq
OpenCore Plus
Time-Out
OpenCore Plus hardware evaluation can support the following two
modes of operation:
Behavior
■
■
Untethered —the design runs for a limited time
Tethered —requires a connection between your board and the host
computer. If tethered mode is supported by all megafunctions in a
design, the device can operate for a longer time or indefinitely
All megafunctions in a device time out simultaneously when the most
restrictive evaluation time is reached. If there is more than refer to one
megafunction in a design, a specific megafunction’s time-out behavior
may be masked by the time-out behavior of the other megafunctions.
1
For MegaCore functions, the untethered time out is 1 hour; the
tethered time out value is indefinite.
Your design stops working after the hardware evaluation time expires,
the reads and writes go low, and the wait output goes high.
f
For more information on OpenCore Plus hardware evaluation, refer to
“OpenCore Plus Evaluation” on page 1–3 and AN 320: OpenCore Plus
Evaluation of Megafunctions .
Interfaces &
This section describes the following topics:
Signals
■
“Interface Description” on page 3–10
■
“Signals” on page 3–22
Interface Description
This section describes the following Avalon interface requests:
3–10 MegaCore Version 9.1
Altera Corporation
QDRII SRAM Controller MegaCore Function User Guide
November 2009
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