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参数资料
型号： ISP1561BM,557
厂商： ST-ERICSSON
元件分类： 总线控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封装： 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-128
文件页数： 70/103页
文件大小： 457K
代理商： ISP1561BM,557
ISP1561_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 5 March 2007
69 of 103
NXP Semiconductors
ISP1561
HS USB PCI Host Controller
11.4 Operational registers of enhanced USB Host Controller
11.4.1 USBCMD register (address: content of the base address register + 0Ch)
The USB Command (USBCMD) register indicates the command to be executed by the
serial Host Controller. Writing to this register causes a command to be executed.
Table 103 shows the USBCMD register bit allocation.
Bit
15
14
13
12
11
10
9
8
Symbol
reserved
Reset
00000000
Access
--------
Bit
7
6
5
4
3
2
1
0
Symbol
IST[3:0]
reserved
PFLF
64AC
Reset
00010010
Access
RRRR
-
RR
Table 102. HCCPARAMS register: bit description
Bit
Symbol
Description
31 to 8
-
reserved
7 to 4
IST[3:0]
Isochronous Scheduling Threshold: Default = implementation
dependent. This eld indicates, relative to the current position of the
executing Host Controller, where software can reliably update the
isochronous schedule. When IST[3] is logic 0, the value of the least
signicant three bits indicates the number of micro frames a Host
Controller can hold a set of isochronous data structures, one or more,
before ushing the state. When IST[3] is logic 1, then host software
assumes the Host Controller may cache an isochronous data structure
for an entire frame.
3 to 2
-
reserved
1
PFLF
Programmable Frame List Flag: Default = implementation
dependent. If this bit is cleared, the system software must use a frame
list length of 1024 elements with this Host Controller. The USBCMD
register FLS (Frame List Size) eld is a read-only register and must be
cleared. If PFLF is set, the system software can specify and use a
smaller frame list and congure the host through the USBCMD register
FLS eld. The frame list must always be aligned on a 4 kB page
boundary to ensure that the frame list is always physically contiguous.
0
64AC
64-bit Addressing Capability: This eld documents the addressing
range capability.
0 — Data structures using 32-bit address memory pointers
1 — Data structures using 64-bit address memory pointers
Table 103. USBCMD register: bit allocation
Bit
31
30
29
28
27
26
25
24
Symbol
reserved
Reset
00000000
Access
--------
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