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| 型号： | ISP1561BM,557 |
| 厂商： | ST-ERICSSON |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP128 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-128 |
| 文件页数： | 78/103页 |
| 文件大小： | 457K |
| 代理商： | ISP1561BM,557 |
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ISP1561_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 5 March 2007
76 of 103
NXP Semiconductors
ISP1561
HS USB PCI Host Controller
11.4.5 CTRLDSSEGMENT register (address: content of the base address register +
1Ch)
The Control Data Structure Segment (CTRLDSSEGMENT) register corresponds to the
most signicant address bits (bits 63 to 32) for all EHCI data structures. If the 64AC (64-bit
Addressing Capability) eld in HCCPARAMS is cleared, then this register is not used and
software cannot write to it (reading from this register returns zero).
If the 64AC (64-bit Addressing Capability) eld in HCCPARAMS is set, this register is used
with link pointers to construct 64-bit addresses to EHCI control data structures. This
register is concatenated with the link pointer from either the PERIODICLISTBASE,
ASYNCLISTADDR, or any control data structure link eld to construct a 64-bit address.
This register allows the host software to locate all control data structures within the same
4 GB memory segment.
11.4.6 PERIODICLISTBASE register (address: content of the base address
register + 20h)
The Periodic Frame List Base Address (PERIODICLISTBASE) register contains the
beginning address of the periodic frame list in the system memory. If the Host Controller is
in 64-bit mode, as indicated by logic 1 in the 64AC (64-bit Addressing Capability) eld in
the HCCPARAMS register, the most signicant 32 bits of every control data structure
address comes from the CTRLDSSEGMENT register. The system software loads this
register before starting the schedule execution by the Host Controller. The memory
structure referenced by this physical memory pointer is assumed as 4 kB aligned. The
contents of this register are combined with the FRINDEX register to enable the Host
Controller to step through the periodic frame list in sequence. The bit allocation is given in
Table 110. FRINDEX register: bit description
Bit
Symbol
Description
31 to 14
-
reserved
13 to 0
FRINDEX [13:0]
Frame Index: Bits in this register are used for the frame number in
the SOF packet and as the index into the frame list. The value in this
register increments at the end of each time frame. For example,
micro frame. The bits used for the frame number in the SOF token
are taken from bits 13 to 3 of this register. Bits N to 3 are used for the
frame list current index. This means that each location of the frame
list is accessed eight times, frames or micro frames, before moving
to the next index. Table 111 illustrates N based on the value of the
FLS (Frame List Size) eld in the USBCMD register.
Table 111. N based value of FLS[1:0]
FLS[1:0]
Number elements
N
00b
1024
12
01b
512
11
10b
256
10
11b
reserved
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISP1561BMGA | 功能描述:IC USB HOST CTRL HI-SPD 128LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| ISP1561BMGE | 功能描述:IC USB PCI HOST CTRLR 128-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| ISP1561BMUM | 功能描述:IC USB HOST CTRL HI-SPD 128LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| ISP1562 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller |
| ISP1562BE | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller |
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