
Arch
9 Wed May 28 17:36:23 1997
Draft 1/21/97
L64007 MPEG-2, DVB, JSAT Transport Demultiplexer Technical Manual
2-9
PRE.4 for Rev. D
Copyright 1997 by LSI Logic Corporation. All rights reserved.
Figure 2.6
Filtering Frequency
Error
The output of the Sigma Delta is fed through an external RC network,
then to the voltage control input of an external VCxO device. The VCxO
output clock is the master clock input to the L64007 and drives the LMC
counter.
Equation 2.2 shows how to translate the ltered frequency error
value to a 16-bit Sigma Delta value.
Equation 2.2
where:
VCR - Voltage Control Range. For the common VCxO, the range is
between 0.5 V and 4.5 V; thus, the VCR value is 4 V.
FCR - Frequency Control Range. For the common VCxO, the range
is
±50 ppm; thus, the FCR value is 100 ppm.
FFErr - Filtered Frequency Error. Note that this is a software calcu-
lation.
SDC - Sigma Delta Change. This is the correction step from the cur-
rent value.
The 16-bit Sigma Delta circuit generates a train of pulses so a simple
external RC lter network can remove all the AC components from the
voltage control signal, and output only the DC component. The DC com-
ponent represents the average value of the pulses. The L64007’s Sigma
Delta output is 3.3-V open drain, but the external circuit shown in
Figure 2.7
VCxO Loop Filter
Circuit
Digital
Filter
FErr(n)
FFErr(m)
VCR
5
volt
---------------
2
16 )
×
FCR
--------------------------------------
FFErr
SDC
=
×