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| 型号： | NT5CB256M4AN-BF |
| 厂商： | NANYA TECHNOLOGY CORP |
| 元件分类： | DRAM |
| 英文描述： | DDR DRAM, PBGA78 |
| 封装： | 0.80 MM PITCH, ROHS COMPLIANAT, WBGA-78 |
| 文件页数： | 12/106页 |
| 文件大小： | 2599K |
| 代理商： | NT5CB256M4AN-BF |
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1Gb DDR3 SDRAM A-Die
NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP
13
REV 1.2
01 / 2009
the DRAM is in idle state, i.e. all banks are in the precharged state with tRP satisfied, all data bursts are completed and CKE is high
prior to writing into the mode register. The mode registers are divided into various fields depending on the functionality and/or modes.
The mode register MR0 stores data for controlling various operating modes of DDR3 SDRAM. It controls burst length, read burst type,
CAS latency, test mode, DLL reset, WR, and DLL control for precharge Power-Down, which include various vendor specific options to
make DDR3 SDRAM useful for various applications. The mode register is written by asserting low on CS#, RAS#, CAS#, WE#, BA0,
BA1, and BA2, while controlling the states of address pins according to the following figure.
MR0 Definition
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
Address Filed
BL
A0
A1
8 (Fixed)
0
BC4 or 8
(on the fly)
1
0
Burst Length
Burst Type
A3
Nibble
Sequential
0
Interleave
1
Burst Type
MRS mode
BA0
BA1
MR0
0
1
0
MRS mode
0
1
DLL Control for
Precharge PD
A12
Slow Exit (Low Power)
0
Fast Exit (Normal)
1
Precharge Power Down
*
WR(cycles)
A9
A10
A11
Reserved
0
5
1
0
Write recovery for autoprecharge**
0
1
0
1
0
1
0
1
0
1
DLL Reset
A8
NO
0
YES
1
DLL Reset
Mode
A7
Normal
0
TEST
1
Mode
* BA2 and A13 are reserved for future use and must be set to 0 when
programming the MR.
**WR(write recovery for autoprecharge)min in clock cycles is calculated by
dividing tWR (ns) by tCK (ns) and rounding up to the next integer:
Wrmin[cycles] = Roundup(tWR/tCK). The value in the mode register must
be programmed to be equal or larger than WRmin. The programmed WR
value is used with tRP to determine tDAL.
CAS Latency
A2
A4
A5
0
5
0
CAS Latency
0
1
BC4 (Fixed)
Reserved
A6
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
6
7
8
9
10
Reserved
6
7
8
10
12
Reserved
MR1
MR2
MR3
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NT5CB256M8FN-DI | 制造商:Nanya Technology Corporation 功能描述:MEMORY IC |
| NT5CB256M8GN-CG | 制造商:Nanya Technology Corporation 功能描述:DRAM |
| NT5CB64M16DP-CF | 制造商:Nanya Technology Corporation 功能描述:DRAM |
| NT5CB64M16FP-DH | 制造商:Nanya Technology Corporation 功能描述:MEMORY |
| NT5CB64M16FP-DII | 制造商:Nanya Technology Corporation 功能描述:MEMORY IC |
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