参数资料
型号: NT5CB256M4AN-BF
厂商: NANYA TECHNOLOGY CORP
元件分类: DRAM
英文描述: DDR DRAM, PBGA78
封装: 0.80 MM PITCH, ROHS COMPLIANAT, WBGA-78
文件页数: 32/106页
文件大小: 2599K
代理商: NT5CB256M4AN-BF
1Gb DDR3 SDRAM A-Die
NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP
31
REV 1.2
01 / 2009
Extended Temperature Usage
a. Auto Self-refresh supported
b. Extended Temperature Range supported
c. Double refresh required for operation in the Extended Temperature Range.
Mode Register Description
Field
Bits
Description
ASR
MR2(A6)
Auto Self-Refresh (ASR)
When enabled, DDR3 SDRAM automatically provides Self-Refresh power management
functions for all supported operating temperature values. If not enabled, the SRT bit must be
programmed to indicate TOPER during subsequent Self-Refresh operation.
0 = Manual SR Reference (SRT)
1 = ASR enable
SRT
MR2(A7)
Self-Refresh Temperature (SRT) Range
If ASR = 0, the SRT bit must be programmed to indicate TOPER during subsequent Self-Refresh
operation. If ASR = 1, SRT bit must be set to 0.
0 = Normal operating temperature range
1 = Extended operating temperature range
Auto Self-Refresh mode - ASR mode
DDR3 SDRAM provides an Auto-Refresh mode (ASR) for application ease. ASR mode is enabled by setting MR2 bit A6=1 and MR2
bit A7=0. The DRAM will manage Self-Refresh entry in either the Normal or Extended Temperature Ranges. In this mode, the DRAM
will also manage Self-Refresh power consumption when the DRAM operating temperature changes, lower at low temperatures and
higher at high temperatures. If the ASR option is not supported by DRAM, MR2 bit A6 must set to 0. If the ASR option is not enabled
(MR2 bit A6=0), the SRT bit (MR2 bit A7) must be manually programmed with the operating temperature range required during
Self-Refresh operation. Support of the ASR option does not automatically imply support of the Extended Temperature Range.
Self-Refresh Temperature Range - SRT
SRT applies to devices supporting Extended Temperature Range only. If ASR=0, the Self-Refresh Temperature (SRT) Range bit must
be programmed to guarantee proper self-refresh operation. If SRT=0, then the DRAM will set an appropriate refresh rate for
Self-Refresh operation in the Normal Temperature Range. If SRT=1, then the DRAM will set an appropriate, potentially different,
refresh rate to allow Self-Refresh operation in either the Normal or Extended Temperature Ranges. The value of the SRT bit can effect
self-refresh power consumption, please refer to IDD table for details.
Self-Refresh mode summary
MR2
A[6]
MR2
A[7]
Self-Refresh operation
Allowed Operating
Temperature Range
for Self-Refresh mode
0
Self-Refresh rate appropriate for the Normal Temperature Range
Normal (0 ~ 85C)
0
1
Self-Refresh appropriate for either the Normal or Extended Temperature Ranges.
The DRAM must support Extended Temperature Range. The value of the SRT bit
can effect self-refresh power consumption, please refer to the IDD table for details.
Normal and Extended
(0 ~ 95C)
1
0
ASR enabled (for devices supporting ASR and Normal Temperature Range).
Self-Refresh power consumption is temperature dependent.
Normal (0 ~ 85C)
1
0
ASR enabled (for devices supporting ASR and Extended Temperature Range).
Self-Refresh power consumption is temperature dependent.
Normal and Extended
(0 ~ 95C)
1
Illegal
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