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| 型号： | IDT88P8341BHGI |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 27/96页 |
| 文件大小： | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 标准包装： | 24 |
| 系列： | * |
| 其它名称： | 88P8341BHGI |
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33
IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
4.3 Microprocessor interface to SPI-3 datapath
capture/insert configurable parameters
Enable insertion / capture of data to the SPI-3 or SPI-4 data stream (which
is dependent on the egress control register). For each direction, the following
are to be used:
- Data for insertion or data captured
- Data available: set when data is available. Asserted by device for capture,
asserted by microprocessor for insertion.
- LID: Logical Identifier of capture / insertion channel
- Length: length of data for insertion or capture
- Flags: SOP, EOP, address parity error, data parity error, packet error
Thereareseparateinstantiationsofmicroprocessorinsertcapturebuffersfor
SPI-3 and SPI-4.
Capture data fragment
Packets can be captured from the SPI-3-4 stream and directed towards the
microprocessor. The capture buffer can store only one 256 byte packet
fragment. When the buffer is full the DATA_AVAILABLE flag is set and a SPI-
3captureeventisgenerated.Theeventisdirectedtowardstheinterruptmodule.
Read packet data fragment
The microprocessor needs to read a buffer to capture a packet fragment. It
verifies the DATA_AVAILABLE flag in the SPI-3 capture control register.
Microprocessor reads the packet fragment and EOP, SOP, ERROR, LID and
LENGTHfieldsfromtheSPI-3datacapturebuffer.Microprocessorhandsover
controlofthecapturebufferwhenitclearstheDATA_AVAILABLEflagintheSPI-
3 data capture control register (Table 31 - SPI-3 data capture control register).
4.3.1 SPI-3 to ingress microprocessor interface
datapath
The diagram below shows the datapath through the device from the SPI-3
interface to the microprocessor capture interface.
The following is a description of the path taken by a fragment of data through
the device.
DataentersonaSPI-3interfaceinfragments.Fragmentsareofequallength
except the last fragment of a packet which may be shorter. The LP address is
in-band with the data. The fragment enters a SPI-3 ingress buffer. SPI-3 LP
address, error information, SOP, and EOP are stored with the fragment. The
LP address is mapped to a LID. The fragment is stored in LID allocated buffer
segments.
The Table 80, SPI-3 egress port descriptor table (64 entries) is consulted,
and the PFP decides to send this LID to the microprocessor capture port. Data
ismovedtothecapturebufferalongwiththeLPaddress.LID,errorinformation,
SOP, and EOP. The data available bit is set. Data and control information are
read from the relevant register space through the microprocessor interface.
Figure 22. SPI-3 ingress to microprocessor capture interface datapath
Figure 21 . Microprocessor data capture buffer
6372 drw22
flags
length
data[1]
data[2]
data[255]
lid
data[0]
SOP
EA
ED
PAR
EOP
not used
EA
ED
PAR
data parity error
address parity error
packet error
70
inser
tsequence
t
t+1
t+258
e
xtr
act
sequence
t
t+1
t+258
…
JTAG
uproc
Chip Counters Memory
SPI-3
8 bit / 32 bit
Min: 19.44MHz
Max: 133MHz
SPI-4.2
Min: 80 MHz
Max: 400 MHz
Interf
ace
Bloc
k
Interf
ace
Bloc
k
SPI-3 /
LID map
SPI-4 /
LID map
Main
Memory
A
LID Counters Memory
6372 drw23
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT88P8341BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT88P8342BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT88P8342BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT88P8344 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 |
| IDT88P8344BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
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