- 您现在的位置：买卖IC网 > PDF目录4580 > IDT88P8341BHGI (IDT, Integrated Device Technology Inc)IC SPI3-SPI4 EXCHANGE 820-PBGA PDF资料下载
参数资料
| 型号： | IDT88P8341BHGI |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 67/96页 |
| 文件大小： | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 标准包装： | 24 |
| 系列： | * |
| 其它名称： | 88P8341BHGI |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页当前第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页
7
IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
List of Tables (Continued)
Table 112 - SPI-4 ingress bit alignment counter register (0x02 to 0x0B) ......................................................................................................................... 73
Table 113 - SPI-4 ingress manual alignment phase/result register (0x0C to 0x1F) .......................................................................................................... 73
Table 114 - SPI -4 egress data lane timing register (register_offset 0x2A) ....................................................................................................................... 73
Table 115 - SPI-4 egress Control Lane Timing register (Register_offset 0x2B) ............................................................................................................... 74
Table 116 - SPI-4 egress data clock timing register (register_offset 0x2C) ....................................................................................................................... 74
Table 117 - SPI-4 egress status timing register (register_offset 0x2D) ............................................................................................................................ 74
Table 118 - SPI-4 egress status clock timing register (register_offset 0x2E) .................................................................................................................... 74
Table 119 - PMON timebase control register (register_offset 0x00) ................................................................................................................................. 75
Table 120 - Timebase register (register_offset 0x01) ...................................................................................................................................................... 75
Table 121 - Clock generator control register (register_offset 0x10) ................................................................................................................................. 75
Table 122 - OCLK and MCLK frequency select encoding ............................................................................................................................................... 75
Table 123 - GPIO register (register_offset 0x20) ............................................................................................................................................................ 76
Table 124 - GPIO monitor table (5 entries 0x21-0x25 for GPIO[0] through GPIO[4]) ....................................................................................................... 76
Table 125 - Version number register (register_offset 0x30) ............................................................................................................................................. 76
Table 126 – JTAG instructions ........................................................................................................................................................................................ 77
Table 127 – Absolute maximum ratings ........................................................................................................................................................................... 77
Table 128 – Recommended Operating Conditions .......................................................................................................................................................... 77
Table 129 – Terminal Capacitance ................................................................................................................................................................................. 78
Table 130 – Thermal Characteristics .............................................................................................................................................................................. 78
Table 131 – DC Electrical characteristics ........................................................................................................................................................................ 79
Table 132 – SPI-3 AC Input / Output timing specifications ................................................................................................................................................ 80
Table 133 – SPI-4.2 LVDS AC Input / Output timing specifications .................................................................................................................................... 82
Table 134 – SPI-4 LVTTL status AC Characteristics ....................................................................................................................................................... 82
Table 135 – REF_CLK clock input ................................................................................................................................................................................. 82
Table 136 – OCLK[3:0] clock inputs and MCLK internal clock ......................................................................................................................................... 82
Table 137 – Microprocessor interface ............................................................................................................................................................................ 82
Table 138 – Microprocessor parallel port Motorola read timing ....................................................................................................................................... 83
Table 139 – Microprocessor parallel port Motorola write timing ....................................................................................................................................... 84
Table 140 – Microprocessor parallel port Intel mode read timing ..................................................................................................................................... 85
Table 141 – Microprocessor parallel port Intel mode write timing ..................................................................................................................................... 86
Table 142 – Microprocessor serial peripheral interface timing ......................................................................................................................................... 87
相关PDF资料 |
PDF描述 |
|---|---|
| LFEC15E-4FN484C | IC FPGA 10.2KLUTS 288I/O 484-BGA |
| IDT72V51446L7-5BBI | IC FLOW CTRL MULTI QUEUE 256-BGA |
| LFEC15E-4F484C | IC FPGA 10.2KLUTS 288I/O 484-BGA |
| LT3022IMSE-1.8#TRPBF | IC REG LDO 1.8V 1A 16-MSOP |
| LT3022IMSE-1.5#TRPBF | IC REG LDO 1.5V 1A 16-MSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT88P8341BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT88P8342BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT88P8342BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT88P8344 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 |
| IDT88P8344BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
发布紧急采购，3分钟左右您将得到回复。