参数资料
型号: IPR-FFT
厂商: Altera
文件页数: 19/70页
文件大小: 0K
描述: IP FFT/IFFT RENEW
标准包装: 1
系列: *
类型: MegaCore
功能: 快速傅里叶变换处理器
许可证: 续用许可证
Chapter 1: About This MegaCore Function
1–15
Performance and Resource Utilization
Table 1–23 lists the variable streaming data flow performance, with in order inputs
and bit-reversed outputs, for width 16 (32 for floating point), for Stratix V
(5SGXEA7H3F35C2) devices.
1
The variable streaming with fixed-point number representation uses natural word
growth, therefore the multiplier requirement is larger compared with the equivalent
streaming FFT with the same number of points.
If you want to significantly reduce M20K memory utilization, set a lower f MAX target.
Table 1–22. Performance with the Variable Streaming Data Flow Engine Architecture—Stratix V Devices
Point Type
Points
Combinational
ALUTs
Logic
Registers
Memory
Bits M20K
DSP
Blocks
f MAX
(MHz)
Clock
Cycle
Count
Transform
Time ( ? s)
Fixed
Fixed
Fixed
Floating
Floating
Floating
256
1024
4096
256
1024
4096
2,543
3,518
4,568
15,017
19,239
23,402
4,319
5,724
7,290
15,778
19,551
23,295
10,239
42,204
170,537
34,445
141,114
571,894
15
20
31
62
91
121
10
14
18
24
32
40
348
330
331
334
323
320
256
1,024
4,096
256
1,024
4,096
0.73
3.1
12.36
0.77
3.17
12.82
Table 1–24 lists resource usage with buffered burst data flow architecture, using the
4 multipliers/2 adders complex multiplier structure, for data and twiddle width 16,
for Stratix V (5SGXEA7H3F35C2) devices.
Table 1–23. Resource Usage with Buffered Burst Data Flow Architecture—Stratix IV Devices
Points
256
1024
4096
256
1024
4096
256
1024
4096
Number of
Engines (1)
1
1
1
2
2
2
4
4
4
Combinational
ALUTs
1,958
1,997
2,031
3,264
3,310
3,344
5,715
5,776
5,857
Logic
Registers
3,828
4,042
4,235
6,053
6,247
6,462
10,897
11,115
11,341
Memory
(Bits)
30,976
123,136
491,776
30,976
123,136
491,776
30,976
123,136
491,776
Memory
(M20K)
16
16
30
30
30
30
59
59
59
DSP Blocks
6
6
6
12
12
12
24
24
24
f MAX
(MHz)
430
403
402
380
379
366
337
348
312
Note to Table 1–24 :
(1) When using the buffered burst architecture, you can specify the number of quad-output FFT engines in the FFT parameter editor.
November 2013
Altera Corporation
FFT MegaCore Function
User Guide
相关PDF资料
PDF描述
10PX2200MEFC10X16 CAP ALUM 2200UF 10V 20% RADIAL
VE-J7L-EZ-F2 CONVERTER MOD DC/DC 28V 25W
100ZLH68MEFC8X20 CAP ALUM 68UF 100V 20% RADIAL
VE-J7K-EZ-F4 CONVERTER MOD DC/DC 40V 25W
UPA0J681MPD1TD CAP ALUM 680UF 6.3V 20% RADIAL
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