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| 型号： | IPR-FFT |
| 厂商： | Altera |
| 文件页数： | 58/70页 |
| 文件大小： | 0K |
| 描述： | IP FFT/IFFT RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | 快速傅里叶变换处理器 |
| 许可证： | 续用许可证 |
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3–16
Chapter 3: Functional Description
Signals
Table 3–3. Parameters (Part 3 of 3)
Parameter
Use M-RAM or M144K blocks
Implement appropriate logic
functions in RAM
On or Off
On or Off
Value
Description
Implements suitable data RAM blocks within the FFT MegaCore
function in M-RAM (M144K in Stratix III and Stratix IV devices)
to reduce M4K (M9K) RAM block usage, in device families that
support M-RAM blocks.
Not available for variable streaming architecture, or in the
Cyclone series of device families, or in Stratix V devices.
Uses embedded RAM blocks to implement internal logic
functions, for example, tapped delay lines in the FFT MegaCore
function. This option reduces the overall logic element count.
Not available for variable streaming architecture.
Signals
f For more information about the Avalon-ST interface, refer to the Avalon Streaming
Table 3–4. Avalon-ST Signals (Part 1 of 2)
Signal Name
clk
Direction
Input
Avalon-ST Type
clk
1
Size
Description
Clock signal that clocks all internal FFT engine
components.
Active-low asynchronous reset signal.This signal
can be asserted asynchronously, but must remain
asserted at least one clk clock cycle and must be
reset_n
Input
reset_n
1
deasserted synchronously with clk .
chapter in volume 1 of the Quartus II Handbook for
a sample circuit that ensures synchronous
deassertion of an active-low reset signal.
sink_eop
Input
endofpacket
1
Indicates the end of the incoming FFT frame.
Indicates an error has occurred in an upstream
module, because of an illegal usage of the
Avalon-ST protocol. The following errors are
defined (refer to Table 3–6 ):
■
00 = no error
sink_error
Input
error
2
■
01 = missing start of packet (SOP)
■
■
10 = missing end of packet (EOP)
11 = unexpected EOP
If this signal is not used in upstream modules, set
to zero.
sink_imag
Input
data
data precision
width
Imaginary input data, which represents a signed
number of data precision bits.
FFT MegaCore Function
User Guide
November 2013 Altera Corporation
相关PDF资料 |
PDF描述 |
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| 100ZLH68MEFC8X20 | CAP ALUM 68UF 100V 20% RADIAL |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-FIR | 功能描述:开发软件 FIR Compiler MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-FIRII | 功能描述:开发软件 FIR Compiler II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPRI2CCMFP001 | 制造商:System Level Solutions (SLS) 功能描述:IP CORE, FPGA, I2C CNTLR, FOR CYCLONE, STRATIX, Software Application:IP CORE, In |
| IPR-ILKN/100G | 功能描述:开发软件 Interlaken - 100G MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-ILKN/50G | 功能描述:开发软件 Interlaken - 50G MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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