- 您现在的位置：买卖IC网 > PDF目录16073 > IPR-FFT (Altera)IP FFT/IFFT RENEW PDF资料下载
参数资料
| 型号： | IPR-FFT |
| 厂商： | Altera |
| 文件页数： | 36/70页 |
| 文件大小： | 0K |
| 描述： | IP FFT/IFFT RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | 快速傅里叶变换处理器 |
| 许可证： | 续用许可证 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页当前第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页
2–12
Chapter 2: Getting Started
Simulate the Design
Table 2–1. Generated Files (Part 2 of 2)
Filename
(1)
&
(2)
Description
A MegaCore function variation file, which defines a VHDL or Verilog HDL top-level
< variation name >. vhd , or .v
< variation name > _1n1024cos.hex ,
< variation name > _2n1024cos.hex ,
< variation name > _3n1024cos.hex
< variation name > _1n1024sin.hex ,
< variation name > _2n1024sin.hex ,
< variation name > _3n1024sin.hex
< variation name > _model.m
< variation name > _tb.m
< variation name > _syn.v or
< variation name > _syn.vhd
< variation name > _tb.v or
< variation name > _tb.vhd
< variation name > _nativelink.tcl
description of the custom MegaCore function. Instantiate the entity defined by
this file inside of your design. Include this file when compiling your design in the
Quartus II software.
Intel hex-format ROM initialization files (not generated for variable streaming
FFT).
Intel hex-format ROM initialization files (not generated for variable streaming
FFT).
MATLAB m-file describing a MATLAB bit-accurate model.
MATLAB testbench.
A timing and resource netlist for use in some third-party synthesis tools.
Verilog HDL or VHDL testbench file.
Tcl Script that sets up NativeLink in the Quartus II software to natively simulate
< variation name > _twr1_opt.hex ,
< variation name > _twi1_opt.hex ,
< variation name > _twr2_opt.hex ,
< variation name > _twi2_opt.hex ,
< variation name > _twr3_opt.hex ,
Intel hex-format ROM initialization files (variable streaming FFT only).
< variation name > _twi3_opt.hex ,
< variation name > _twr4_opt.hex ,
< variation name > _twi4_opt.hex ,
(1) These files are variation dependent, some may be absent or their names may change.
(2) < variation name > is a prefix variation name supplied automatically by IP Toolbench.
2. After you review the generation report, click Exit to close IP Toolbench. Then click
Yes on the Quartus II IP Files prompt to add the . qip file describing your custom
MegaCore function to the current Quartus II project.
f Refer to the Quartus II Help for more information about the MegaWizard Plug-In
Manager.
You can now integrate your custom MegaCore function variation into your design
and simulate and compile.
Simulate the Design
This section describes the following simulation techniques:
FFT MegaCore Function
User Guide
■
■
November 2013 Altera Corporation
相关PDF资料 |
PDF描述 |
|---|---|
| 10PX2200MEFC10X16 | CAP ALUM 2200UF 10V 20% RADIAL |
| VE-J7L-EZ-F2 | CONVERTER MOD DC/DC 28V 25W |
| 100ZLH68MEFC8X20 | CAP ALUM 68UF 100V 20% RADIAL |
| VE-J7K-EZ-F4 | CONVERTER MOD DC/DC 40V 25W |
| UPA0J681MPD1TD | CAP ALUM 680UF 6.3V 20% RADIAL |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-FIR | 功能描述:开发软件 FIR Compiler MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-FIRII | 功能描述:开发软件 FIR Compiler II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPRI2CCMFP001 | 制造商:System Level Solutions (SLS) 功能描述:IP CORE, FPGA, I2C CNTLR, FOR CYCLONE, STRATIX, Software Application:IP CORE, In |
| IPR-ILKN/100G | 功能描述:开发软件 Interlaken - 100G MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-ILKN/50G | 功能描述:开发软件 Interlaken - 50G MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
发布紧急采购，3分钟左右您将得到回复。