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| 型号： | IPR-FFT |
| 厂商： | Altera |
| 文件页数： | 51/70页 |
| 文件大小： | 0K |
| 描述： | IP FFT/IFFT RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | 快速傅里叶变换处理器 |
| 许可证： | 续用许可证 |
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Chapter 3: Functional Description
3–9
I/O Data Flow Architectures
To change direction on a block-by-block basis, assert or deassert inverse
(appropriately) simultaneously with the application of the sink_sop pulse (concurrent
with the first input data sample of the block). When the FFT has completed the
transform of the input block, it asserts source_valid and outputs the complex
transform domain data block. The FFT function asserts the source_sop to indicate the
first output sample. The order of the output data depends on the output order that
you select in IP Toolbench. The output of the FFT may be in natural order or bit-
reversed order. Figure 3–6 shows the output flow control when the output order is bit-
reversed. If the output order is natural order, data flow control remains the same, but
the order of samples at the output is in sequential order 1.. N .
Figure 3–6. Output Flow Control—Bit Reversed Order
clock
source_sop
source_eop
source_valid
source_ready
source_real
source_imag
x0
x0
x512
x512
x256
x256
x768
x768
x128
x128
x640
x640
x384
x384
x896
x896
x1023
x1023
Enabling the Variable Streaming FFT
The FFT processes data when there is valid data transferred to the module
( sink_valid asserted). Figure 3–7 shows the FFT behavior when sink_valid is
deasserted.
Figure 3–7. FFT Behavior When sink_valid is Deasserted
Clock
sink_ v alid
Frame 1
Inp u t Data
The inp u t data stops,
b u t the o u tp u t contin u es
Frame 2
W hen the FFT is stopped within
a frame, the o u tp u t pa u ses
O u tp u t Data
so u rce_ v alid
When sink_valid is deasserted during a frame, the FFT stalls and no data is
processed until sink_valid is reasserted. This implies that any previous frames that
are still in the FFT also stall.
If sink_valid is deasserted between frames, the data currently in the FFT continues to
be processed and transferred to the output. Figure 3–7 shows the FFT behavior when
sink_valid is deasserted between frames and within a frame.
The FFT may optionally be disabled by deasserting the clk_en signal.
November 2013
Altera Corporation
FFT MegaCore Function
User Guide
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| IPR-FIR | 功能描述:开发软件 FIR Compiler MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-FIRII | 功能描述:开发软件 FIR Compiler II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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| IPR-ILKN/50G | 功能描述:开发软件 Interlaken - 50G MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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