收藏本站
参数资料
型号： MC92603VF
厂商： Freescale Semiconductor
文件页数： 46/126页
文件大小： 0K
描述： IC TXRX ETH QUAD GIG 256-MAPBGA
标准包装： 1
类型： 收发器
驱动器/接收器数： 4/4
规程： 千兆位以太网
电源电压： 4.5 V ~ 5.5 V
安装类型： 表面贴装
封装/外壳： 256-LBGA
供应商设备封装： 256-MAPBGA
包装： 托盘
Transmitter
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, Rev. 1
2-4
Freescale Semiconductor
2.3
Transmitter Interface Configuration
The transmitter may operate in one of eight data interface configurations as shown in Table 2-2. The
compatibility configuration pin, COMPAT, establishes operation in either the backplane applications mode
or the Ethernet compatible mode. The 10-bit interface enable, TBIE, configuration input, determines if the
internal 8B/10B encoder will be used with uncoded input data or bypassed for a pre-encoded (coded) input
data. When the DDR configuration pin is enabled, it reduces the interface from an 8-/10-bit single data rate
interface to a 4-/5-bit double data rate interface.
The configuration signals, COMPAT and TBIE, also affect the receiver’s configuration.
Transmit data is sampled and stored in the input FIFO on the rising edge (single data rate) of the
appropriate transmit clock, if DDR is low, or both edges (double data rate) of the transmit clock if DDR is
high. The FIFO accepts data to be transmitted and synchronizes it to the internal clock domain.
The 8B/10B encoder takes an 8-bit data/control from the input register and encodes it into 10-bit
transmission characters. The fibre channel 8B/10B coding standard is followed [1,2]. A detailed
TST_1, TST_0
Test mode config inputs
Decoded to define various test modes (see
Chapter 6, “Test Features,
” for details)
Input
—
MEDIA
Media impedance select
Indicates the impedance of the transmission media.
Low indicates 50
and high indicates 75 .
Input
—
XLINK_x_N/
XLINK_x_P
Link serial transmit data
Differential serial transmit data output pads
Output
—
Internal Signals
rx_clock
High-speed transceiver
clock
Internal, differential high speed clock used to
transmit and receive link data
Input
—
repeat_data
Received repeat data
Repeater mode, received data to re-transmit
Input
—
loop_back_data
Loopback data
Differential loopback transmit data
Output
—
auto_neg_enable
Auto-negotiation enable
Auto-negotiate is enabled if this signal is high and in
GMII mode
Input
High
Table 2-2. MC92603 Data Interface Modes
Data Interface Mode
COMPAT
TBIE
DDR
Backplane 8-bit uncoded data
Low
Backplane (4-bit reduced interface) uncoded data
Low
High
Backplane 10-bit coded data
Low
High
Low
Backplane (5-bit reduced interface) coded data
Low
High
Ethernet compatible GMII
High
Low
Ethernet compatible RGMII
High
Low
High
Ethernet compatible TBI
High
Low
Ethernet compatible RTBI
High
Table 2-1. MC92603 Transmitter Interface Signals (continued)
Signal Name
Description
Function
Direction
Active
State
相关PDF资料
PDF描述
MC92604VM IC ETH TXRX DUAL GIG 196-MAPBGA
MC92604ZT IC TXRX ETH DUAL GIG 196-MAPBGA
MCP2120T-I/SL IC ENCODR/DECODR 2.5V IR 14-SOIC
MCP2122-E/P IC ENCODER/DECODER IRDA 8-DIP
MCP2122T-E/SNG IC ENCODER/DECODR INFRARED 8SOIC
相关代理商/技术参数
参数描述
MC92603VM 功能描述:IC ETH TXRX QUAD GIG 256-MAPBGA RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR)
MC92604VM 功能描述:IC ETH TXRX DUAL GIG 196-MAPBGA RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR)
MC92604ZT 功能描述:IC TXRX ETH DUAL GIG 196-MAPBGA RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:25 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:4.5 V ~ 5.5 V 安装类型:通孔 封装/外壳:16-DIP（0.300"，7.62mm） 供应商设备封装:16-PDIP 包装:管件
MC92610 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Quad 3.125 Gbaud SERDES
MC92610VF 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Quad 3.125 Gbaud SERDES
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*