参数资料
型号: MC92603VF
厂商: Freescale Semiconductor
文件页数: 81/126页
文件大小: 0K
描述: IC TXRX ETH QUAD GIG 256-MAPBGA
标准包装: 1
类型: 收发器
驱动器/接收器数: 4/4
规程: 千兆位以太网
电源电压: 4.5 V ~ 5.5 V
安装类型: 表面贴装
封装/外壳: 256-LBGA
供应商设备封装: 256-MAPBGA
包装: 托盘
Management Interface (MDIO)
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, Rev. 1
4-2
Freescale Semiconductor
4.2
MDIO Registers
The specification calls for up to 64 registers to be supported by MDIO. Some registers must be included
to meet the minimum MDIO specification; they are identified as the basic register set. Other registers are
optional and are considered part of the extended register set. The MC92603 has four sets of MDIO
registers (one per transceiver channel). Registers for address 0–6 and 15–18, as defined in the standard
specification, are fully supported. Registers 7–14 and 19–31 are not supported in the MC92603. The
MDIO registers are identified in Table 4-1.
Table 4-1. MDIO Management Register Set
MDIO Register
Address (RA)
Register Name
Basic/Extended
Register Set
Supported by
MC92603
0
Control
B
Yes
1
Status
2, 3
PHY identifier
E
4
Auto-negotiation advertisement
5
Auto-negotiation link partner base page ability
6
Auto-negotiation expansion
7
Auto-negotiation next page transmit
No
8
Auto-negotiation link partner received next page
9
Master-slave control register
10
Master-slave status register
11–14
Reserved
15
Extended status
B
Yes
16
Vendor specific—permanent configuration control
E
17
Vendor specific—channel configuration and status
18
Vendor specific—BERT error counter
19–31
Vendor specific—not implemented
No
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