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型号： MC92603VF
厂商： Freescale Semiconductor
文件页数： 71/126页
文件大小： 0K
描述： IC TXRX ETH QUAD GIG 256-MAPBGA
标准包装： 1
类型： 收发器
驱动器/接收器数： 4/4
规程： 千兆位以太网
电源电压： 4.5 V ~ 5.5 V
安装类型： 表面贴装
封装/外壳： 256-LBGA
供应商设备封装： 256-MAPBGA
包装： 托盘
Receiver
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, Rev. 1
Freescale Semiconductor
3-15
When operating in GMII mode, the receiver status is reported by RECV_x_ERR and RECV_x_DV and
encoded on the RECV_x_[7:0] data signals, as shown in Table 3-10.
3.7.1.2
TBI Operation
The Ethernet TBI interface is enabled by asserting the TBIE and COMPAT inputs high. When in this mode,
the MC92603 will conform to the IEEE Std. 802.3-2002 TBI interface signals and protocol. The complete
TBI connection to a standard Ethernet MAC is shown in Table 3-11. Note that MDIO is available for use
when not in GMII mode.
The receiver interface works similar to the backplane 10-bit mode, except that word synchronization is not
supported and a non-aligned operation is not allowed. Also, in this mode, the XMIT_x_K input is not
Table 3-10. Receiver Status in GMII Mode
RECV_x_
ERR
RECV_x_
DV
RECV_x_
RCLK_B
RECV_x_
[7:0]
Description
High
Low
0x00
Not byte sync: The receiver is in start-up or has lost byte
alignment and is searching for alignment.
Low
Don’t care
Normal inter-frame gap
Low
High
Low
Data
Normal operation, valid data code group received.
High
Low
0x20
Error propagation
High
Low
0x10
Disparity error
High
Low
0x08
Code error
High
Low
0x04
Overrun
High
Low
0x02
Underrun
Table 3-11. TBI Connection to Standard Ethernet MAC
IEEE
Std. 802.3-2002
Signal Name
Function
Direction
(Relative to
MC92603)
Port Name
PMA_TX_CLK
Transmit clock
Input
XMIT_x_CLK
tx_code_group<9:0>
Transmit data
Input
XMIT_x_ERR, XMIT_x_ENABLE, XMIT_x_[7:0]
EWRAP
Enable data wraparound
Input
XMIT_x_LBE
EN_CDET
Enable COMMA detect
Input
XMIT_x_K
COM_DET
Receiver detected a COMMA
Output
RECV_x_COMMA
rx_code_group<9:0>
Receive data
Output
RECV_x_ERR, RECV_x_DV, RECV_x_[7:0]
-LCK_REF
Enable lock to reference
Input
RCCE (normally low, affects all 4 channels)
PMA_RX_CLK<0:1>
Receive clocks (both phases)
Output
RECV_x_RCLK, RECV_x_RCLK_B
The following output is available, but is not a standard TBI signal:
—
Receiver detected an error
Output
RECV_x_K
The following inputs must be externally pulled up/down as indicated:
Pull up
Management interface enable
Input
MDIO_EN
Variable (PUP/PUD)
MDIO PHY address
Input
MD_ADR[4:2]
Pull up
Configuration
Input
TBIE
Pull up
Configuration
Input
BSYNC
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