参数资料
型号: MT42L64M32D1KL-3 IT:A
厂商: Micron Technology Inc
文件页数: 128/164页
文件大小: 0K
描述: IC DDR2 SDRAM 2GBIT 168FBGA
标准包装: 1,000
格式 - 存储器: RAM
存储器类型: 移动 LPDDR2 SDRAM
存储容量: 2G(64M x 32)
速度: 333MHz
接口: 并联
电源电压: 1.14 V ~ 1.3 V
工作温度: -25°C ~ 85°C
封装/外壳: 168-WFBGA
供应商设备封装: 168-FBGA(12x12)
包装: 散装
2Gb: x16, x32 Mobile LPDDR2 SDRAM S4
Output Characteristics and Operating Conditions
Table 72: Differential AC and DC Output Levels
Symbol
V OHdiff(AC)
V OLdiff(AC)
Parameter
AC differential output HIGH measurement level (for output SR)
AC differential output LOW measurement level (for output SR)
Value
+ 0.2 x V DDQ
- 0.2 x V DDQ
Unit
V
V
Single-Ended Output Slew Rate
With the reference load for timing measurements, the output slew rate for falling and
rising edges is defined and measured between V OL(AC) and V OH(AC) for single-ended
signals.
Table 73: Single-Ended Output Slew Rate Definition
Measured
Description
From
To
Defined by
Single-ended output slew rate for rising edge
Single-ended output slew rate for falling edge
V OL(AC)
V OH(AC)
V OH(AC)
V OL(AC)
[V OH(AC) - V OL(AC)
[V OH(AC) - V OL(AC)
Δ TR SE
Δ TF SE
Note:
1. Output slew rate is verified by design and characterization and may not be subject to
production testing.
Figure 89: Single-Ended Output Slew Rate Definition
TF SE
TR SE
V OH(AC)
V REF
V OL(AC)
Time
Table 74: Single-Ended Output Slew Rate
Notes 1–5 apply to all parameters conditions
Value
Parameter
Single-ended output slew rate (output impedance = 40 Ω
Single-ended output slew rate (output impedance = 60 Ω
Output slew-rate-matching ratio (pull-up to pull-down)
Symbol
SRQ SE
SRQ SE
Min
1.5
1.0
0.7
Max
3.5
2.5
1.4
Unit
V/ns
V/ns
Notes:
1. Definitions: SR = slew rate; Q = output (similar to DQ = data-in, data-out); SE = single-
ended signals.
PDF: 09005aef83f3f2eb
2gb_mobile_lpddr2_s4_g69a.pdf – Rev. N 3/12 EN
128
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2010 Micron Technology, Inc. All rights reserved.
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