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R8C/38T-A Group
16. Timer RB2
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0241EJ0010 Rev.0.10
Page 256 of 730
Aug 05, 2011
16.3.7
Timer RB2 Secondary Register (TRBSC)
Note:
1. The values in registers TRBPR and TRBSC are reloaded and counted alternately. The count value can be read
from the TRBPR register while the secondary period is counted.
In the 8-bit timer with 8-bit prescaler, the 8-bit TRBSC register is used to set the secondary period used in
programmable waveform and programmable wait one-shot generation modes. When read, the value is read
from the reload register.
In the 16-bit timer, the 8-bit TRBSC register is used to set the higher 8-bit secondary period used in
programmable waveform and programmable wait one-shot generation modes. This setting can be made in timer
mode and programmable one-shot generation mode, but it is not used for counter operation. When read, the
value is read from the reload register.
The TRBSC register is configured with a master – reload register structure, so the reload register is written
simultaneously while the count is stopped. During the counter operation, the timing for updating the reload
If 1 (count is forcibly stopped) is written to the TSTOP bit in the TRBCR register, the TRBSC register is
initialized (FFh).
Address 00136h (TRBSC_0)
Bit
b7b6
b5b4b3
b2b1b0
Symbol
————
———
—
After Reset
1
111
1111
Bit
Mode
Function
Initial
Value
Setting
Range
R/W
8-Bit Timer with
8-Bit Prescaler
16-Bit Timer
b7 to b0 Timer mode
Disabled
FFh
Invalid
—
Programmable waveform
generation mode
Timer RB2 prescaler
underflow
Internal count
source or timer RJ
underflow (1)
FFh
00h to FFh
R/W
Programmable one-shot
generation mode
Disabled
FFh
Invalid
—
Programmable wait one-shot
generation mode
Timer RB2 prescaler
underflow
Internal count
source or timer RJ
underflow (1)
FFh
00h to FFh
R/W