R8C/38T-A Group
23. A/D Converter
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0241EJ0010 Rev.0.10
Page 565 of 730
Aug 05, 2011
23.10 Notes on A/D Converter
23.10.1 Notes on A/D Conversion
Write to registers ADMOD, ADINSEL, ADCON0 (other than ADST bit), ADCON1, and OCVREFCR when
A/D conversion is stopped (before a trigger occurs).
When using the A/D converter in repeat mode 0, repeat mode 1, or repeat sweep mode, the frequency of the
CPU clock during A/D conversion must be set to be a frequency higher than that of the A/D converter
operating clock
AD.
Do not select fHOCO-F as
AD.
Do not enter stop mode during A/D conversion.
Do not enter wait mode during A/D conversion regardless of the state of the CM02 bit in the CM0 register (1:
Peripheral function clock stops in wait mode or 0: Peripheral function clock does not stop in wait mode).
Do not set the FMSTP bit in the FMR0 register to 1 (flash memory stops) during A/D conversion.
Do not set the CM10 bit in the CM1 register to 1 (all clocks stop (stop mode)) during A/D conversion.
After setting the ADST bit in the ADCON0 register to 0 (A/D conversion stops) by a program during A/D
conversion to forcibly end the conversion, allow two or more cycles of the
AD clock before writing 1 to the
ADST bit to ensure time for end processing.
23.10.2 Clock Source Switching
Stop A/D conversion before switching the clock source. After switching the clock source, wait for at least two
cycles of the fHOCO-F clock to before starting A/D conversion.
[Changing procedure]
(1) Set the ADST bit in the ADCON0 register to 0 (A/D conversion stops).
(2) Change the CKS2 bit in the ADMOD register.
(3) Wait for at least two cycles of the fHOCO-F clock.
(4) Set the ADST bit in the ADCON0 register to 1 (A/D conversion starts).
To change the clock source from fHOCO-F to another clock and then stop fHOCO-F, after switching the clock
source, wait at least two cycles of fHOCO-F before stopping fHOCO-F.
[Changing procedure]
(1) Set the ADST bit in the ADCON0 register to 0 (A/D conversion stops).
(2) Change the CKS2 bit in the ADMOD register.
(3) Wait for at least two cycles of the fHOCO-F clock.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off).
Notes:
1. Do not set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off) while fHOCO-F is
selected as the clock source.
2. Do not change the division ratio of the high-speed on-chip oscillator set by the FRA2 register while
fHOCO-F is selected as the count source.
23.10.3 Pin Handling
Connect a 0.1 μF capacitor between pins VREF and AVSS.