R8C/38T-A Group
20. Serial Interface (UART2)
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0241EJ0010 Rev.0.10
Page 440 of 730
Aug 05, 2011
(3) SCL2 Pin Low Output Hold Function 3
When the I2C bus performs slave transmission, the master generates (or doesn't generate) an acknowledge
in synchronization with the 9th bit.
At this time, the slave checks for an acknowledge. If an acknowledge is detected, transmission continues
(next transmit data is set). If an acknowledge is not detected, transmission ends.
a low level is output to the SCL2 pin of UART2 in synchronization with the SCL of the final bit going low
after the first 9 bits (ACK/NACK) of data are received. This forces the master into a wait state. The
function can also continue or end transmission after the acknowledge determination processing by
software is completed.
This function is enabled by setting the SWC9 bit to 1, and disabled by setting it to 0.
After the SCL2 pin has been driven low by this function, it can be released from low level by setting the
SWC9 bit to 0. This function should only be used when the MCU is being used as a slave.
Figure 20.20Figure 20.20
Timing of SCL2 Pin Low Output Hold Function 3
20.3.3.10 SDA2 Pin Output Disable Function
If its own address differs from the address specified by the master, a slave must turn off (high impedance)
SDA2 pin output.
UART2 achieves this by turning off SDA2 pin output by setting 1FFh to the transmit buffer register every nine
clocks (every time a receive interrupt request is generated) of SCL. SDA2 pin output can also be turned off
using the SDA2 pin output disable function of UART2. This function is enabled by setting the SDHI bit to 1,
which allows UART2 SDA2 pin output to be set to high impedance without setting 1FFh to the transmit buffer
register. This function is disabled by setting the SDHI bit to 0.
(Acknowledge determination
processing and transmit
continue/end processing)
Master SCL
Setting the SWC9 bit to 0 frees
the SCL2 pin from low output
SWC9
1st bit
2nd bit
8th bit
9th bit
Transmit SCL
The SCL2 pin is held
low here