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参数资料
型号： ADUC7061BCPZ32-RL
厂商： Analog Devices Inc
文件页数： 5/108页
文件大小： 0K
描述： IC MCU 16/32BIT 32KB 32LFCSP
产品变化通告： ADuC7060/1 Idd Specification Change 01/Feb/2010
设计资源： USB Based Temperature Monitor Using ADuC7061 and an External RTD (CN0075)
4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145)
标准包装： 5,000
系列： MicroConverter® ADuC7xxx
核心处理器： ARM7
芯体尺寸： 16/32-位
速度： 10MHz
连通性： I²C，SPI，UART/USART
外围设备： POR，PWM，温度传感器，WDT
输入/输出数： 8
程序存储器容量： 32KB（16K x 16）
程序存储器类型： 闪存
RAM 容量： 1K x 32
电压 - 电源 (Vcc/Vdd)： 2.375 V ~ 2.625 V
数据转换器： A/D 5x24b，8x24b，D/A 1x14b
振荡器型： 内部
工作温度： -40°C ~ 125°C
封装/外壳： 32-VFQFN 裸露焊盘，CSP
包装： 带卷 (TR)
ADuC7060/ADuC7061
Data Sheet
Rev. D | Page 102 of 108
Table 112. GPxCON MMR Bit Designations
Bit
Description
31:30
Reserved.
29:28
Reserved.
27:26
Reserved.
25:24
Selects the function of the P0.6/RTS and P1.6/PWM pins.
23:22
Reserved.
21:20
Selects the function of the P0.5/CTS and P1.5/PWM3 pins.
19:18
Reserved.
17:16
Selects the function of the P0.4/IRQ0/PWM1 and
P1.4/PWM2 pins.
15:14
Reserved.
13:12
Selects the function of the P0.3/MOSI/SDA and P1.3/TRIP
pins.
11:10
Reserved.
9:8
Selects the function of the P0.2/MISO and P1.2/SYNC pins.
7:6
Reserved.
5:4
Selects the function of the P0.1/SCLK/SCL, P1.1/SOUT,
and P2.1/IRQ3/PWM5 pins.
3:2
Reserved.
1:0
Selects the function of the P0.0/SS, P1.0/IRQ1/SIN/T0,
P2.0/IRQ2/PWM0/EXTCLK pins.
GPxDAT REGISTERS
GPxDAT are Port x configuration and data registers. They con-
figure the direction of the GPIO pins of Port x, set the output
value for the pins that are configured as output, and store the
input value of the pins that are configured as input.
Table 113. GPxDAT Registers
Name
Address
Default Value
Access
GP0DAT
0xFFFF0D20
0x000000XX
R/W
GP1DAT
0xFFFF0D30
0x000000XX
R/W
GP2DAT
0xFFFF0D40
0x000000XX
R/W
Table 114. GPxDAT MMR Bit Designations
Bit
Description
31:24
Direction of the data.
Set to 1 by user to configure the GPIO pin as an output.
Cleared to 0 by user to configure the GPIO pin as an input.
23:16
Port x data output.
15:8
Reflect the state of Port x pins at reset (read only).
7:0
Port x data input (read only).
GPxSET REGISTERS
GPxSET are data set Port x registers.
Table 115. GPxSET Registers
Name
Address
Default Value
Access
GP0SET
0xFFFF0D24
0x000000XX
W
GP1SET
0xFFFF0D34
0x000000XX
W
GP2SET
0xFFFF0D44
0x000000XX
W
Table 116. GPxSET MMR Bit Designations
Bit
Description
31:24
Reserved.
23:16
Data Port x set bit.
Set to 1 by user to set bit on Port x; also sets the
corresponding bit in the GPxDAT MMR.
Cleared to 0 by user; does not affect the data output.
15:0
Reserved.
GPxCLR REGISTERS
GPxCLR are data clear Port x registers.
Table 117. GPxCLR Registers
Name
Address
Default Value
Access
GP0CLR
0xFFFF0D28
0x000000XX
W
GP1CLR
0xFFFF0D38
0x000000XX
W
GP2CLR
0xFFFF0D48
0x000000XX
W
Table 118. GPxCLR MMR Bit Designations
Bit
Description
31:24
Reserved.
23:16
Data Port x clear bit.
Set to 1 by user to clear the bit on Port x; also clears
the corresponding bit in the GPxDAT MMR.
Cleared to 0 by user; does not affect the data output.
15:0
Reserved.
GPxPAR REGISTERS
The GPxPAR registers program the parameters for Port 0, Port 1,
and Port 2. Note that the GPxDAT MMR must always be written
after changing the GPxPAR MMR. Note that it is not possible to
disable the internal pull-up resistor on P0.2.
Table 119. GPxPAR Registers
Name
Address
Default Value
Access
GP0PAR
0xFFFF0D2C
0x00000000
R/W
GP1PAR
0xFFFF0D3C
0x00000000
R/W
GP2PAR
0xFFFF0D4C
0x00000000
R/W
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