参数资料
型号: ADUC7061BCPZ32-RL
厂商: Analog Devices Inc
文件页数: 76/108页
文件大小: 0K
描述: IC MCU 16/32BIT 32KB 32LFCSP
产品变化通告: ADuC7060/1 Idd Specification Change 01/Feb/2010
设计资源: USB Based Temperature Monitor Using ADuC7061 and an External RTD (CN0075)
4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145)
标准包装: 5,000
系列: MicroConverter® ADuC7xxx
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 10MHz
连通性: I²C,SPI,UART/USART
外围设备: POR,PWM,温度传感器,WDT
输入/输出数: 8
程序存储器容量: 32KB(16K x 16)
程序存储器类型: 闪存
RAM 容量: 1K x 32
电压 - 电源 (Vcc/Vdd): 2.375 V ~ 2.625 V
数据转换器: A/D 5x24b,8x24b,D/A 1x14b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 32-VFQFN 裸露焊盘,CSP
包装: 带卷 (TR)
Data Sheet
ADuC7060/ADuC7061
Rev. D | Page 7 of 108
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
External Reference Input
Range12
0.1
AVDD
V
VREF Divide-by-2 Initial Error1
0.1
%
DAC CHANNEL SPECIFICATIONS
RL = 5 k, CL = 100 pF
Voltage Range
0
VREF
V
0
AVDD 0.2
V
DAC 12-BIT MODE
DC Specifications13
Resolution
12
Bits
Relative Accuracy
±2
LSB
Differential Nonlinearity
Guaranteed monotonic
±0.2
±1
LSB
Offset Error
1.2 V internal reference
±2
±15
mV
Gain Error
VREF range (reference = 1.2 V)
±1
%
AVDD range
±1
%
Gain Error Mismatch
0.1
% of full
scale on
DAC
DAC 16-BIT MODE1
Only monotonic to 14 bits
DC Specifications14
Resolution
14
Bits
Relative Accuracy
For 14-bit resolution
±3
LSB
Differential Nonlinearity
Guaranteed monotonic (14 bits)
±0.5
±1
LSB
Offset Error
1.2 V internal reference
±2
±15
mV
Gain Error
VREF range (reference = 1.2 V)
±1
%
AVDD range
±1
%
Gain Error Mismatch
0.1
% of full
scale on
DAC
DAC AC CHARACTERISTICS
Voltage Output Settling Time
10
s
Digital-to-Analog Glitch Energy
1 LSB change at major carry
(where maximum number of
bits simultaneously change in
the DAC0DAT register)
±20
nV-sec
TEMPERATURE SENSOR1, 15
After user calibration
Accuracy
MCU in power-down or standby
mode
±4
°C
Voltage Output at 0°C
Typical value
96
mV
Voltage Tempco
Typical value
0.28
mV/°C
Thermal Impedance
48-lead LFCSP
27
°C/W
48-lead LQFP
55
°C/W
32-lead LFCSP
30
°C/W
POWER-ON RESET (POR)
POR Trip Level1
Refers to voltage at DVDD pin
Power-on level
2.0
V
Power-down level
2.25
V
RESET Timeout from POR
Maximum supply ramp between
1.8 V and 2.25 V; after POR trip,
DVDD must reach 2.25 V within
this time limit
128
ms
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