参数资料
型号: ADUC7061BCPZ32-RL
厂商: Analog Devices Inc
文件页数: 91/108页
文件大小: 0K
描述: IC MCU 16/32BIT 32KB 32LFCSP
产品变化通告: ADuC7060/1 Idd Specification Change 01/Feb/2010
设计资源: USB Based Temperature Monitor Using ADuC7061 and an External RTD (CN0075)
4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145)
标准包装: 5,000
系列: MicroConverter® ADuC7xxx
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 10MHz
连通性: I²C,SPI,UART/USART
外围设备: POR,PWM,温度传感器,WDT
输入/输出数: 8
程序存储器容量: 32KB(16K x 16)
程序存储器类型: 闪存
RAM 容量: 1K x 32
电压 - 电源 (Vcc/Vdd): 2.375 V ~ 2.625 V
数据转换器: A/D 5x24b,8x24b,D/A 1x14b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 32-VFQFN 裸露焊盘,CSP
包装: 带卷 (TR)
Data Sheet
ADuC7060/ADuC7061
Rev. D | Page 83 of 108
UART Control Register 1
This 8-bit register controls the operation of the UART in
conjunction with COMCON0.
COMCON1 Register
Name:
COMCON1
Address:
0xFFFF0710
Default value: 0x00
Access:
Read and write
Table 91. COMCON1 MMR Bit Designations
Bit
Name
Description
7:5
Reserved bits. Not used.
4
LOOPBACK
Loopback. Set by user to enable
loopback mode. In loopback mode,
the transmit pin is forced high.
3:2
Reserved bits. Not used.
1
RTS
Request to send.
Set by user to force the RTS output to 0.
Cleared by user to force the RTS
output to 1.
0
DTR
Data terminal ready.
Set by user to force the DTR output to 0.
Cleared by user to force the DTR
output to 1.
UART Status Register 0
COMSTA0 Register
Name:
COMSTA0
Address:
0xFFFF0714
Default value: 0x60
Access:
Read only
Function:
This 8-bit read-only register reflects the
current status on the UART.
Table 92. COMSTA0 MMR Bit Designations
Bit
Name
Description
7
Reserved.
6
TEMT
COMTX and shift register empty status bit.
Set automatically if COMTX and the shift
register are empty. This bit indicates that
the data has been transmitted, that is, no
more data is present in the shift register.
Cleared automatically when writing to
COMTX.
5
THRE
COMTX empty status bit.
Set automatically if COMTX is empty.
COMTX can be written as soon as this bit
is set; the previous data might not have
been transmitted yet and can still be
present in the shift register.
Cleared automatically when writing to
COMTX.
4
BI
Break indicator.
Set when P1.0/IRQ1/SIN/T0 pin is held
low for more than the maximum word
length.
Cleared automatically.
3
FE
Framing error.
Set when the stop bit is invalid.
Cleared automatically.
2
PE
Parity error.
Set when a parity error occurs.
Cleared automatically.
1
OE
Overrun error.
Set automatically if data is overwritten
before being read.
Cleared automatically.
0
DR
Data ready.
Set automatically when COMRX is full.
Cleared by reading COMRX.
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