参数资料
| 型号： | CORE1553BRT-AR |
| 厂商： | Microsemi SoC |
| 文件页数： | 33/74页 |
| 文件大小： | 0K |
| 描述： | IP MODULE CORE1553 REMOTE TERM |
| 标准包装： | 1 |
| 系列： | * |
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Core1553BRT v4.0 Handbook
Error Detection
Table 5-5 ? Error Detection
Error Condition
Command Word
1. Parity or Manchester encoding errors
2. Incorrect SYNC waveform
Mode Codes
Action
Command is ignored.
No interrupt generated.
MSGERR in SW is set, and the SW is
1. Illegal mode code or invalid subaddress (from internal transmitted.
or external legality block)
Broadcast Data Commands
1. TX bit set in command word
Data Word
1. Parity or Manchester encoding errors
2. Incorrect number of words received
3. Data words are continuous.
4. Incorrect SYNC waveform
RT-to-RT
1. First command word must be RX.
Message Failure interrupt generated.
Data transfer is aborted.
MSGERR in SW is set, and the SW is
not transmitted.
Message Failure interrupt generated.
Data transfer is aborted.
MSGERR in SW is set, and the SW is
not transmitted.
Message Failure interrupt generated.
Data transfer is aborted.
MSGERR in SW is set, and the SW is
2. Second command word must be TX and non- not transmitted.
broadcast.
3. RX RT checks the TX SW and verifies the SYNC
pattern, RT address, MSGERR, and BUSY fields.
4. The first data word sync must be received within 57 μs
of the command word parity bit.
Transmit Data Error
Message Failure interrupt generated.
Data transfer is aborted.
1. The RT monitors its transmissions on the bus through MSGERR in SW is set, and the SW is
its decoder and verifies that the correct data is not transmitted.
transmitted with no Manchester or parity errors.
Backend Failure
Message Failure interrupt generated.
Data transfer is aborted.
1. The RT makes sure that the backend responds to MSGERR in SW is set, and the SW is
BUSY
read and write cycles within the required time.
not transmitted.
Message Failure interrupt generated.
Data transfer is aborted.
1. Backend RTBUSY input is active at any point during BUSY in SW is set, and the SW is
the message.
Transmitter Overrun
1. Transmits for greater than 668 μs. The internal state
machines prevent this from happening, but the core
includes the required timer and functionality. This is
implemented separately to the encoder to provide
complete protection.
Revision 3
transmitted.
Message Failure interrupt generated.
Core shuts down transmissions on bus.
33
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