参数资料
型号: CORE1553BRT-AR
厂商: Microsemi SoC
文件页数: 57/74页
文件大小: 0K
描述: IP MODULE CORE1553 REMOTE TERM
标准包装: 1
系列: *
Core1553BRT v4.0 Handbook
Modifying the Backend Address Map
The default setting of Core1553BRT creates 32 receive and 32 transmit subaddresses, each with 32
words of memory, which in turn requires 2,048 words of memory. Receive subaddresses 0 and 31 are
used for storing either the 1553B command word or the TSW value.
You can use an external address mapping function to modify the backend address map to match the
software models of legacy 1553B remote terminals, allowing software drivers to be reused ( Figure 7-1 ).
You can use the CMDVAL output to generate the mapped address function; however, it must be
externally latched using the ADDRLAT signal (ADDRLAT is an active high enable for an external D-type
flip-flop).
CMDVAL
D
SET
Q
CLK1553
ADDRLAT
MEMADDR
MEMOPER
L
CLR
Q
Address
Mapper
Function
Mapped
Address
Figure 7-1 ? External Address Mapper Circuit
A typical address mapping function, given below, remaps the backend memory map to an 8 k word
memory. Each subaddress is allocated 64 words, and separate buffers are provided for both broadcast
and non-broadcast receive/transmit.
Each non-mode-code subaddress consists of 64 words; the command word or TSW value is written to
location 0, and the associated data words are stored at locations 32 to 63.
For the mode code subaddresses, the command word or TSW value is written to location 0 plus the
mode code value, and the data word is stored at location 32 plus the mode code value. For the “transmit
vector word” command, the command word is stored in location 16, and the vector word is read from
location 48. For the “synchronize with data” command, the command word is stored at location 17 and
the data written to location 49. Note that separate address spaces exist for transmit and receive mode
codes and broadcast transmit and receive mode codes.
This mapping function is very small; it requires only 23 logic modules in the Microsemi SX-A and RTSX-
S families. Consider the code below.
VHDL Address Mapping Function
entity ADDRESSMAPPER
is
port ( CLK :
ADDRLAT :
CMDVAL :
MEMADDR :
MEMOPER :
MAPADDR :
in
in
in
in
in
out
std_logic;
std_logic;
std_logic_vector(11 downto 0);
std_logic_vector(10 downto 0);
std_logic_vector( 1 downto 0);
std_logic_vector(12 downto 0)
);
end ADDRESSMAPPER;
architecture RTL of ADDRESSMAPPER is
signal CMDADDR : std_logic_vector(11 downto 0);
begin
process (CLK)
begin
if CLK'event and CLK='1' then
if ADDRLAT='1' then
Revision 3
57
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