参数资料
| 型号： | CORE1553BRT-AR |
| 厂商： | Microsemi SoC |
| 文件页数： | 53/74页 |
| 文件大小： | 0K |
| 描述： | IP MODULE CORE1553 REMOTE TERM |
| 标准包装： | 1 |
| 系列： | * |
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7 – Implementation Hints
You can configure Core1553BRT to provide backend interfaces for a variety of hardware and software
requirements.
The backend interface has been designed to simplify backend hardware design; the core supports both
synchronous and asynchronous backends with bus arbitration and variable read and write strobe pulse
widths.
To accommodate software requirements, you can modify the backend address map and interrupt vectors
Table 7-1 ? Typical Core Implementations
Type
Standard-CW
Standard-TSW
Direct Device
Description
A 2k×16 memory buffer is used with 32 words of memory
allocated for each TX and RX subaddress. The 1553B
command word is written to memory locations unused by
the mode code subaddresses. The system can read the
command word value to determine the number of words
that were received.
A 2k×16 memory buffer is used with 32 words of memory
allocated for each TX and RX subaddress. The Core1553B
TSW is written to memory locations unused by the mode
code subaddresses. The system can read the TSW value
to determine the number of words that were received. This
implementation provides extra status information, such as
the bus on which the message was received.
No memory is used; the Core1553BRT backend directly
connects to the device. In this case, all unused 1553B
subaddresses should be invalidated. If the device only
accepts a fixed number of data words, only that word count
should be legal for the subaddress in use. Should an error
be detected, this will be indicated by the interrupt vector,
and the data should be discarded. No command words or
TSW values are written to memory.
Parameters
WRTTSW = 0
WRTCMD = 1
EXTMDATA = 0
Address Mapper =
No
CW Legality = No
WRTTSW = 1
WRTCMD = 0
EXTMDATA = 0
Address Mapper =
No
CW Legality = No
WRTTSW = 0
WRTCMD = 0
EXTMDATA = 0
Address Mapper =
No
CW Legality = Yes
Compatibility Mode The memory allocation emulates another 1553B remote
terminal, allowing software drivers to be reused. A backend
address mapping function is implemented that reads and
writes command and data words from and to the memory
addresses used by the remote terminal that Core1553BRT
is replacing.
Revision 3
WRTTSW = 0
WRTCMD = 1
EXTMDATA = 1
Address Mapper =
Yes
CW Legality = Maybe
53
相关PDF资料 |
PDF描述 |
|---|---|
| CORE8051-AR | IP MODULE CORE8051 |
| COREFFT-RM | IP MODULE COREFFT |
| COREFIR-RM | IP MODULE COREFIR |
| COREPCIF-RM | IP MODULE COREPCIF |
| COREU1LL-AR | IP MODULE COREU1LL |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CORE1553BRT-EBR-AN | 功能描述:IP MOD CORE1553 EBR ENH BIT RATE RoHS:否 类别:编程器，开发系统 >> 软件 系列:* 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384 |
| CORE1553BRT-EBR-AR | 功能描述:IP MOD CORE1553 EBR ENH BIT RATE RoHS:否 类别:编程器，开发系统 >> 软件 系列:* 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384 |
| CORE1553BRT-OM | 功能描述:IP MODULE CORE1553 REMOTE TERM RoHS:否 类别:编程器，开发系统 >> 软件 系列:* 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384 |
| CORE1553BRT-OMFL | 功能描述:IP MODULE CORE1553 BUS/REMOTE 制造商:microsemi corporation 系列:- 零件状态:在售 类型:许可证 应用:- 版本:- 许可长度:- 许可 - 用户明细:- 操作系统:- 配套使用产品/相关产品:Microsemi 器件 媒体分发类型:- 标准包装:1 |
| CORE1553BRT-RM | 功能描述:IP MODULE CORE1553 REMOTE TERM RoHS:否 类别:编程器，开发系统 >> 软件 系列:* 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384 |
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