参数资料
| 型号： | IP-RLDRAMII |
| 厂商： | Altera |
| 文件页数： | 15/62页 |
| 文件大小： | 0K |
| 描述： | IP RLDRAM II CONTROLLER |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | RLDRAM II 控制器 |
| 许可证： | 初始许可证 |
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Functional Description
■
■
Generates the RLDRAM II clocks
Generates addresses and commands on:
●
●
System, dedicated, or write clock
Rising or falling edge
■
■
Inserts pipeline registers in address and command and write data
path
Inserts pipeline registers in read data and QVLD path
The datapath provides the interface between the read and write data
busses of the datapath interface and the double-clocked, bidirectional
data bus of the memory interface. The datapath data busses are twice the
width of the memory data bus, because the memory interface transfers
data on both the rising and falling edges of the clock.
IP Toolbench generates a clear-text VHDL or Verilog HDL datapath,
which matches your custom variation. If you are designing your own
controller, Altera recommends that you use this module as your
datapath.
writing to the datapath.
Figure 2–3. Datapath Write Control Signal Timing
clk
control_doing_wr
control_wdata_valid
control_wdata[]
01
23
45
67
control_dm[]
11
Memory Clock Generator
The memory clock generator generates memory clocks. There can be up
to four memory clocks and they are generated with an altddio_out
megafunction.
Address & Command Output Registers
The address and command output registers can have the following
options:
Altera Corporation
November 2009
■
■
System, write, or dedicated clock clocking for the output registers.
Rising or falling edge clocking
MegaCore Version 9.1 2–5
RLDRAM II Controller MegaCore Function User Guide
相关PDF资料 |
PDF描述 |
|---|---|
| IP-RSDEC | IP REED-SOLOMON DECODER |
| IP-SDI | IP VIDEO INTERFACE - SDI |
| IP-SDRAM/DDR2 | IP DDR2 SDRAM CONTROLLER |
| IP-SLITE2 | IP SERIALLITE II |
| IP-SRAM/QDRII | IP QDRII SRAM CONTROLLER |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-NCO | 功能描述:开发软件 NCO Compiler MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-NIOS | 功能描述:开发软件 Nios II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPROBER 520 | 制造商:TTi-Thurlby Thandar Instruments 功能描述:Bulk 制造商:Aim & Thurlby Thandar Instruments 功能描述:PROBE, CURRENT, POSITIONAL, ON PCB TRACK 制造商:Aim & Thurlby Thandar Instruments 功能描述:PROBE, CURRENT, 5MHZ, 2M; Test Probe Ratio:-; Connector Type A:-; Connector Type B:-; Lead Length:2m; Bandwidth:5MHz; SVHC:No SVHC (19-Dec-2012) ;RoHS Compliant: NA |
| IPR-PCI/MT32 | 功能描述:开发软件 PCI 32b MasterTarget MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-PCI/MT64 | 功能描述:开发软件 PCI 64b MasterTarget MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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