参数资料
| 型号： | IP-RLDRAMII |
| 厂商： | Altera |
| 文件页数： | 30/62页 |
| 文件大小： | 0K |
| 描述： | IP RLDRAM II CONTROLLER |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | RLDRAM II 控制器 |
| 许可证： | 初始许可证 |
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Interfaces
During reads, the local interface indicates that read data is valid by
asserting the local_rdata_valid[] signal. All captured read data is
clocked off the clock that captures the RLDRAM II read data. In DQS
mode, this clock is the delayed DQS signal, capture_clk[] , sourced
from the dedicated DQS delay circuitry. In non-DQS mode this clock is
the external capture clock, non_dqs_capture_clk .
In this example, the memory burst length is set to eight beats. The
RLDRAM II device is setup with a t RC of six-clock cycles (configuration
two).
Figure 2–14. Read Example
clk
Local Interface
local_read_req
local_write_req
local_addr[]
local_bank_addr[]
A
A
B
B
C
C
local_rdata_valid[]
local_rdata[]
RLDRAM II Interface
rldramii_clk
rldramii_clk_n
rldramii_cs_n
rldramii_we_n
rldramii_ref_n
A01 A23 A45 A67 B01 B23 B45 B67 C01 C23C45 C67
rldramii_a[]
rldramii_ba[]
rldramii_dm[ ]
A
A
B
B
11
C
C
rldramii_d[]
rldramii_qk[]
rldramii_qvld[]
rldramii_q[]
f
0 1 23 45 6 70 1 2 3 4 5 67 0 1 2 3 4 5 6 7
RLDRAM II interface. In this example, the memory burst length is set to
eight beats. The RLDRAM II device is setup with a t RC of six-clock cycles
(configuration two).
For more information about bus turnaround timing calculations with
CIO devices, refer to AN 325: Interfacing RLDRAM II with Stratix II,
Stratix & Stratix GX Devices .
2–20 MegaCore Version 9.1
RLDRAM II Controller MegaCore Function User Guide
Altera Corporation
November 2009
相关PDF资料 |
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| IP-SDI | IP VIDEO INTERFACE - SDI |
| IP-SDRAM/DDR2 | IP DDR2 SDRAM CONTROLLER |
| IP-SLITE2 | IP SERIALLITE II |
| IP-SRAM/QDRII | IP QDRII SRAM CONTROLLER |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-NCO | 功能描述:开发软件 NCO Compiler MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-NIOS | 功能描述:开发软件 Nios II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPROBER 520 | 制造商:TTi-Thurlby Thandar Instruments 功能描述:Bulk 制造商:Aim & Thurlby Thandar Instruments 功能描述:PROBE, CURRENT, POSITIONAL, ON PCB TRACK 制造商:Aim & Thurlby Thandar Instruments 功能描述:PROBE, CURRENT, 5MHZ, 2M; Test Probe Ratio:-; Connector Type A:-; Connector Type B:-; Lead Length:2m; Bandwidth:5MHz; SVHC:No SVHC (19-Dec-2012) ;RoHS Compliant: NA |
| IPR-PCI/MT32 | 功能描述:开发软件 PCI 32b MasterTarget MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-PCI/MT64 | 功能描述:开发软件 PCI 64b MasterTarget MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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