参数资料
| 型号： | IP-RLDRAMII |
| 厂商： | Altera |
| 文件页数： | 43/62页 |
| 文件大小： | 0K |
| 描述： | IP RLDRAM II CONTROLLER |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | RLDRAM II 控制器 |
| 许可证： | 初始许可证 |
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Functional Description
Table 2–14. Variation Path Parameters
Parameter
Enable hierarchy control
Hierarchy path to
RLDRAM II controller
datapath
Description
The constraints script analyzes your design, to automatically extract the hierarchy to
your variation. To prevent the constraints script analyzing your design, turn on
Enable Hierarchy Control , and enter the correct hierarchy path to your datapath.
The hierarchy path is the path to your RLDRAM II controller datapath, minus the top-
level name. The hierarchy entered in the wizard must match your design, because
the constraints scripts rely on this path for correct operation.
Table 2–15. Device Pin Prefixes
Parameter
Description
Prefix all RLDRAM II pins This string prefixes the pin names for the FPGA pins that are connected to the
on the device with
MegaCore
Verification
RLDRAM II controller.
MegaCore verification involves simulation testing and hardware testing.
Simulation Environment
Altera has carried out extensive functional tests using industry-standard
models to ensure the functionality of the RLDRAM II controller. In
addition, Altera has carried out a wide variety of gate-level tests on the
RLDRAM II controller to verify the post-compilation functionality of the
controller.
Hardware Testing
hardware tested the RLDRAM II controller.
Table 2–16. Altera Development Boards
Development Board
Altera Device
Memory Device
Stratix II Memory Demonstration Board 1 EP2S60F1020C3
Micron 18-bit CIO and SIO RLDRAM II
devices
Altera Corporation
November 2009
MegaCore Version 9.1 2–33
RLDRAM II Controller MegaCore Function User Guide
相关PDF资料 |
PDF描述 |
|---|---|
| IP-RSDEC | IP REED-SOLOMON DECODER |
| IP-SDI | IP VIDEO INTERFACE - SDI |
| IP-SDRAM/DDR2 | IP DDR2 SDRAM CONTROLLER |
| IP-SLITE2 | IP SERIALLITE II |
| IP-SRAM/QDRII | IP QDRII SRAM CONTROLLER |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-NCO | 功能描述:开发软件 NCO Compiler MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-NIOS | 功能描述:开发软件 Nios II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPROBER 520 | 制造商:TTi-Thurlby Thandar Instruments 功能描述:Bulk 制造商:Aim & Thurlby Thandar Instruments 功能描述:PROBE, CURRENT, POSITIONAL, ON PCB TRACK 制造商:Aim & Thurlby Thandar Instruments 功能描述:PROBE, CURRENT, 5MHZ, 2M; Test Probe Ratio:-; Connector Type A:-; Connector Type B:-; Lead Length:2m; Bandwidth:5MHz; SVHC:No SVHC (19-Dec-2012) ;RoHS Compliant: NA |
| IPR-PCI/MT32 | 功能描述:开发软件 PCI 32b MasterTarget MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-PCI/MT64 | 功能描述:开发软件 PCI 64b MasterTarget MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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