参数资料
| 型号： | IP-RLDRAMII |
| 厂商： | Altera |
| 文件页数： | 59/62页 |
| 文件大小： | 0K |
| 描述： | IP RLDRAM II CONTROLLER |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | RLDRAM II 控制器 |
| 许可证： | 初始许可证 |
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Getting Started
1
To achieve a higher frequency, increase the number of
address and command and write data pipeline registers, or
increase the number read data pipeline registers, refer to
To view the constraints in the Quartus II Assignment Editor, choose
Assignment Editor (Assignments menu).
1
If you have “?” characters in the Quartus II Assignment Editor,
the Quartus II software cannot find the entity to which it is
applying the constraints, probably because of a hierarchy
mismatch. Either edit the constraints script, or enter the correct
hierarchy path in the Project Settings tab (refer to step 13 on
f
Program a
Device
f
Implement Your
Design
For more information on constraints, refer to “Constraints” on
After you have compiled the example design, you can perform gate-level
simulation (refer to “Simulate the Example Design” on page 3–11 ) or
program your targeted Altera device to verify the example design in
hardware.
With Altera's free OpenCore Plus evaluation feature, you can evaluate the
RLDRAM II Controller MegaCore function before you obtain a license.
OpenCore Plus evaluation allows you to generate an IP functional
simulation model, and produce a time-limited programming file.
For more information on OpenCore Plus hardware evaluation using the
In the MegaWizard flow, to implement your design based on the example
design, replace the example driver in the example design with your own
logic.
1
A FIFO buffer is not implemented in the core; you must
implement a FIFO buffer.
Set Up Licensing
Altera Corporation
November 2009
You need to obtain a license for the MegaCore function only when you are
completely satisfied with its functionality and performance, and want to
take your design to production.
MegaCore Version 9.1 3–15
RLDRAM II Controller MegaCore Function User Guide
相关PDF资料 |
PDF描述 |
|---|---|
| IP-RSDEC | IP REED-SOLOMON DECODER |
| IP-SDI | IP VIDEO INTERFACE - SDI |
| IP-SDRAM/DDR2 | IP DDR2 SDRAM CONTROLLER |
| IP-SLITE2 | IP SERIALLITE II |
| IP-SRAM/QDRII | IP QDRII SRAM CONTROLLER |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-NCO | 功能描述:开发软件 NCO Compiler MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-NIOS | 功能描述:开发软件 Nios II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPROBER 520 | 制造商:TTi-Thurlby Thandar Instruments 功能描述:Bulk 制造商:Aim & Thurlby Thandar Instruments 功能描述:PROBE, CURRENT, POSITIONAL, ON PCB TRACK 制造商:Aim & Thurlby Thandar Instruments 功能描述:PROBE, CURRENT, 5MHZ, 2M; Test Probe Ratio:-; Connector Type A:-; Connector Type B:-; Lead Length:2m; Bandwidth:5MHz; SVHC:No SVHC (19-Dec-2012) ;RoHS Compliant: NA |
| IPR-PCI/MT32 | 功能描述:开发软件 PCI 32b MasterTarget MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-PCI/MT64 | 功能描述:开发软件 PCI 64b MasterTarget MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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