参数资料
型号: IP-RLDRAMII
厂商: Altera
文件页数: 54/62页
文件大小: 0K
描述: IP RLDRAM II CONTROLLER
标准包装: 1
系列: *
类型: MegaCore
功能: RLDRAM II 控制器
许可证: 初始许可证
RLDRAM II Controller Walkthrough
Table 3–1. Generated Files (Part 2 of 2) Note (1) , (2) , (3)
Filename
< variation name > _auk_rldramii_dm_group.vhd or
Description
Data mask (DM) group.
.v
< variation name > _auk_rldramii_dqs_group.vhd or DQS group.
.v
< variation
Address and command pipeline registers.
name > _auk_rldramii_pipeline_addr_cmd.vhd or
.v
< variation name > _auk_rldramii_pipeline_qvld.vhd Valid data flag (QVLD) pipeline registers.
or .v
< variation
name > _auk_rldramii_pipeline_rdata.vhd or .v
< variation
name > _auk_rldramii_pipeline_wdata.vhd or .v
< variation name > _auk_rldramii_qvld_group.vhd
or .v
< variation name > .html
< variation name > .qip
Read data pipeline registers.
Write data pipeline registers.
QVLD group.
MegaCore function report file.
Contains Quartus II project information for your
MegaCore function variations.
Notes to Table 3–1 :
(1)
(2)
(3)
< top-level name > is the name of the Quartus II project top-level entity.
< variation name > is the name you assign.
< device name > is the device family name.
1.
1
After you review the generation report, click Exit to close IP
Toolbench.
The Quartus II IP File ( .qip ) is a file generated by the
MegaWizard interface, and contains information about the
generated IP core. You are prompted to add this .qip file to the
current Quartus II project at the time of file generation. In most
cases, the .qip file contains all of the necessary assignments and
information required to process the core or system in the
Quartus II compiler. Generally, a single .qip file is generated for
each MegaCore function or system in the Quartus II compiler.
Now, simulate the example design (refer to “Simulate the Example
Design” on page 3–11 ), edit the PLL(s), and compile (refer to “Compile
3–10 MegaCore Version 9.1
RLDRAM II Controller MegaCore Function User Guide
Altera Corporation
November 2009
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