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参数资料
| 型号： | LXT6251A |
| 英文描述： | ATM/SONET MAPPER|CMOS|QFP|208PIN|PLASTIC |
| 中文描述： | 的ATM / SONET的映射器|的CMOS | QFP封装| 208PIN |塑料 |
| 文件页数： | 14/76页 |
| 文件大小： | 995K |
| 代理商： | LXT6251A |
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LXT6251A
—
21 E1 SDH Mapper
14
Datasheet
176
PTTUGA
I
TTLin
Pass-Trough TUG Enable-A.
A High on this pin indicates the TUG
data received coincident with the pulse is to be passed through to the
MTBDATA output. Refer to
“
Add/Drop Configuration
”
on page 30
for
use of this pin. This pin should be tied Low in STM-0 configuration or if
unused.
177
PTTUGB
I
TTLin
Pass-Trough TUG Enable-B.
A High on this pin indicates the TUG
data received coincident with the pulse is to be passed through to the
MTBDATA output. Refer to
“
Add/Drop Configuration
”
on page 30
for
use of this pin. This pin should be tied Low in STM-0 configuration or if
unused.
178
PTSOH
I
TTLin
Pass-Trough SOH Enable.
A High on this pin indicates the SOH
data, HPOH data, and VC-4 fixed stuff (STM-1) received on the
telecom bus is to be passed through to the MTBDATA output. Refer to
“
Add/Drop Configuration
”
on page 30
for use of this pin. This pin
should be tied to ground in STM-0 or STM-1 terminal configurations or
if unused.
Serial Alarm Indication Ports
40
DSAPDATA
O
HiZ - 2mA
Serial Alarm Data.
Output which provides a rapid indication of the V5
byte parity error, TU-AIS, TU-Loss of pointer, Unequipped detect,
Trace ID mismatch, Signal Label mismatch and VC-AIS alarm status
for all 21 VC-12 channels. Refer to
“
Serial/Remote Alarm Processing
Port
”
on page 40
for details.
39
DSAPCLK
O
HiZ - 2mA
Serial Alarm Clock
. Clock frequency is nominally 1.62MHz.
38
DSAPFRM
O
HiZ - 2mA
Serial Alarm Frame.
Frame indicator active during the first bit of the
DSAPDATA data frame.
35
MRAPDATA
I
TTLin
Serial Alarm Data.
Input that contains indication of alarm status
resulting from the V5 byte parity error, TU-AIS, TU-Loss of pointer,
Unequipped detect, Trace ID mismatch, and Signal Label mismatch,
and VC-AIS for all 21 VC-12 channels. Refer to
“
Serial/Remote Alarm
Processing Port
”
on page 40
for details.
36
MRAPCLK
I
TTLin
Serial Alarm Clock input
. The clock frequency is nominally 1.62MHz
37
MRAPFRM
I
TTLin
Serial Alarm Frame.
Frame indicator that must be active during the
first bit of the data frame on MRAPDATA.
Microprocessor Bus
14-22
A<8:0>
I
TTLin
Address Bus
. A nine bit address port for microprocessor access.
4-11
DATA<7:0>
I/O
TTLin-6mA
Data Bus.
Eight bit I/O data port for the microprocessor to read and
write data, commands, and status information to and from the device.
28
WR/RW
I
TTLin
Write signal (Intel); Read/Write signal (Motorola)
29
RD/E
TTLin
Read signal (Intel); Enable signal (Motorola)
26
CS
I
Chip Select.
Active Low signal to enable microprocessor RD or WR
action.
31
MCUTYPE
I
TTLin
Motorola/Intel Interface Mode Select
. Low = Intel,
High = Motorola
30
INT
O
HiZ - 4mA
Interrupt.
Active Low interrupt indication.
Table 2. Pin Descriptions (Continued) (Sheet 6 of 7)
Pin #
Name
Type
Function
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