21 E1 SDH Mapper
—
LXT6251A
Datasheet
53
Nine address bits are used to access the LXT6251A register (512 byte address space). Global
registers occupy memory space from 000H to 00FH, and from 160H and above. Registers
pertaining to the individual TU tributaries are accessed from memory locations 010H through
15FH. The upper 5 address bits identify the tributary (1-21) and the lower 4 address bits identify
the register for a particular tributary. All tributary configuration, status and interrupt registers are
identified within this 4 bit address space. The nomenclature used when referring to tributary
addresses is provided in the
Register Notations and Definitions
section.
8.3.1
Counter Access
There are two performance counters associated with each receive tributary. Both counters contain
at least 11 bits of data and therefore are accessed by reading two adjacent 8 bit register addresses.
Counters are accessed by first buffering their contents and then reading the buffer. Each counter
value is buffered by writing to either register of the counter, then reading both counter addresses
after a wait of at least three clock cycles of the byte clock (6.48 MHz or 19.44 MHz).
For example, to read tributary 21
’
s Low Order Path REI counter in STM-0, a write to register 159H
(15 is a hex value = 21 in decimal) is required. After 0.5uS (3 STM-0 clock cycles), the contents of
the buffer can now be read by reading registers 158H & 159H (in either order).
8.3.2
Register Notations and Definitions
The following notations and definitions are used in the register descriptions.
RO
Read Only. Unless otherwise stated in the
register description, writes have no affect
WO
Write Only. Reads return undefined values.
R/W
Read/Write. A register (or bit) with this
attribute can be read and written.
Reserved Bits
Some of the registers contain
reserved
bits.
Software must deal correctly with reserved
fields. For reads, software must use
appropriate masks to extract the defined bits
and not rely on reserved bits being any
particular value. In some cases, software
must program reserved bit positions to a
particular value. This value is defined in the
individual bit descriptions.