- 您现在的位置：买卖IC网 > PDF目录369885 > LXT6251A ATM/SONET MAPPER|CMOS|QFP|208PIN|PLASTIC PDF资料下载
参数资料
| 型号： | LXT6251A |
| 英文描述： | ATM/SONET MAPPER|CMOS|QFP|208PIN|PLASTIC |
| 中文描述： | 的ATM / SONET的映射器|的CMOS | QFP封装| 208PIN |塑料 |
| 文件页数： | 50/76页 |
| 文件大小： | 995K |
| 代理商： | LXT6251A |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页当前第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页
LXT6251A
—
21 E1 SDH Mapper
50
Datasheet
8.0
Microprocessor Interface & Register Definitions
8.1
Microprocessor Interface
The LXT6251A incorporates an asynchronous microprocessor interface. A microprocessor can be
connected to the LXT6251A for reading and writing data via the microprocessor interface pins.
The microprocessor interface is a generic asynchronous interface, including an address bus
(A<8:0>), data bus (DATA<7:0>) and control pins (WR/RW, RD/E, CS, and AS). The MCUTYPE
input pin configures the type of microprocessor interface is to be used
–
Intel or Motorola. There is
also an INT output pin that indicates alarm conditions to the microprocessor.
8.1.1
Intel Interface
The Intel interface is indicated by driving the MCUTYPE input pin Low. In this mode the WR/RW
input pin is used as a write-bar (WR) and the RD/E input pin as read-bar (RD).
A read cycle is indicated to the LXT6251A by the microprocessor forcing a Low on the RD pin
with the WR pin held High.
A write cycle is indicated to the LXT6251A by the microprocessor forcing a Low on the WR pin
with the RD pin held High.
Both cycles require the CSB pin to be Low and the microprocessor to drive the A<8:0> address
pins. In the case of the write cycle, the microprocessor is also required to drive the DATA<7:0>
data pins. In the case of the read cycle, the LXT6251A drives the DATA<7:0> data pins.
When a multiplexed data/address bus is used, the falling edge of the AS input latches the address
provided on A<8:0>. If the address and data are not multiplexed the AS pin should be tied High.
Timing diagrams for the Intel interface can be found in
Figure 18
and
Figure 19
starting on
page 47
.
8.1.2
Motorola Interface
The Motorola interface is indicated by driving the MCUTYPE input pin High. In this mode the
WR/RW input pin is used as a read/write-bar (RW) and the RD/E input pin as enable clock (E).
A read cycle is indicated to the LXT6251A by the microprocessor forcing a High on the RW pin.
A write cycle is indicated to the LXT6251A by the microprocessor forcing a Low on the RW pin.
Both cycles are initiated by a Low on the E input. The E input is connected to the E output from the
Motorola microprocessor and is typically a 50% duty cycle waveform with a frequency derived
from the microprocessor clock.
Both cycles require the CS pin to be Low and the microprocessor to drive the A<8:0> address pins.
In the case of the write cycle, the microprocessor is also required to drive the DATA<7:0> data
pins. In the case of the read cycle, the LXT6251A drives the DATA<7:0> data pins.
相关PDF资料 |
PDF描述 |
|---|---|
| LXT903PC | LAN Transceiver |
| LXT905LC | Laser Mouse VCSEL Assembly Clip |
| LXT905LE | Single-Mode Vertical-Cavity Surface Emitting laser (VCSEL) |
| LXT905PC | LAN TRANSCEIVER|SINGLE|CMOS|LDCC|28PIN|PLASTIC |
| LXT905PE | LAN TRANSCEIVER|SINGLE|CMOS|LDCC|28PIN|PLASTIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LXT901 | 制造商:LVL1 制造商全称:LVL1 功能描述:8QLYHUVDO (WKHUQHW 7UDQVFHLYHU |
| LXT901/LXT907 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LXT901. LXT907 - Design Guide for LXT901/907 Ethernet Interface Connection to Motorola MC68EN360 Controller |
| LXT901A | 制造商:LVL1 制造商全称:LVL1 功能描述:8QLYHUVDO (WKHUQHW 7UDQVFHLYHU |
| LXT901ALC | 制造商:LEVEL ONE 功能描述: |
| LXT901ALE | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LAN Transceiver |
发布紧急采购，3分钟左右您将得到回复。