STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL
182
Register 052H: SIGX Timeslot Indirect Address/Control (COSS = 0)
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RWB
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
0
0
0
0
0
0
0
0
If the SIGX is enabled for direct microprocessor access, writing to and reading
from the Timeslot Indirect Address Register will not generate any additional
accesses.
A[6:0]:
If the SIGX is enabled for indirect microprocessor access, writing to the
Timeslot Indirect Address Register initiates a microprocessor access request
to one of the registers in segments 2 and 3. The desired register is
addressed using the value written to bits A[6:0].
RWB:
The RWB bit indicates which operation is requested. If RWB is set to logic 1,
a read is requested. After the request has been issued, the Timeslot Indirect
Status register should be monitored to verify completion of the read. The
desired register contents can then be found in the Timeslot Indirect Data
Register. If RWB is set to logic 0, a write is requested. Data to be written to
the microprocessor should first be placed in the Timeslot Indirect Data
Register. For both read and write operations, the BUSY bit in the Timeslot
Indirect Status Register should be monitored to ensure that the previous
access has been completed.
Note: If the value written to A[6:0] addresses a segment 1 register, an access is
not initiated.