STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL
287
Register 09EH: E1 FRMR Frame Pulse/Alarm/V5.2 Link ID Interrupt Enables
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
OOOFE
RAICCRCE
CFEBEE
V52LINKE
IFPE
ICSMFPE
ICMFPE
ISMFPE
0
0
0
0
0
0
0
0
When the E1/T1B bit of the Global Configuration register is a logic 0 or the UNF
bit of the Receive Options register is a logic 1, this register is held reset.
OOOFE:
A logic one in the OOOFE bit enables the generation of an interrupt when the
out of offline frame interrupt (OOOFI) is asserted.
RAICCRCE:
A logic one in the RAICCRCE bit enables the generation of an interrupt when
a RAI and Continuous CRC condition has been detected in the incoming data
stream.
CFEBEE:
A logic one in the CFEBEE bit enables the generation of an interrupt when
continuous FEBEs have been detected in the incoming data stream.
V52LINKE:
A logic one in the V52LINKE bit enables the generation of an interrupt when a
V5.2 link identification has been detected in the Sa7 bits.
IFPE:
The input frame pulse interrupt enable bit allows interrupts to be generated
on each basic frame pulse. If IFPE is a logic 1, a logic 1 in the IFPI bit of the
Frame Pulse Interrupts register will result in the assertion low of the INTB
output.