STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL
318
SYNCI:
The SYNCI bit indicates that the detector has changed synchronization state
since the last time this register was read. If SYNCI is logic 1, the pattern
detector has gained or lost synchronization at least once. SYNCI is set to
logic 0 when this register is read.
BEI:
The BEI bit indicates that one or more bit errors have been detected since
the last time this register was read. When BEI is set to logic 1, at least one
bit error has been detected. BEI is set to logic 0 when this register is read.
XFERI:
The XFERI bit indicates that a transfer of pattern detector data has occurred.
A logic 1 in this bit position indicates that the pattern receive registers, the bit
counter holding registers and the error counter holding registers have been
updated. This update is initiated by writing to one of the pattern detector
register locations, or by writing to the Revision/Chip ID/Global PMON Update
register. XFERI is set to logic 0 when this register is read.
OVR:
The OVR bit is the overrun status of the pattern detector registers. A logic 1 in
this bit position indicates that a previous transfer (indicated by XFERI being
logic 1) has not been acknowledged before the next accumulation interval
has occurred and that the contents of the pattern receive registers, the bit
counter holding registers and the error counter holding registers have been
overwritten. OVR is set to logic 0 when this register is read.