STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL
291
Register 0A8H (#1), 0B0H (#2), 0B8H (#3): TDPR Configuration
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
FLGSHARE
FIFOCLR
PREN
Unused
EOM
ABT
CRC
EN
1
0
0
X
0
0
1
0
R/W
R/W
R/W
R/W
EN:
The EN bit enables the TDPR functions. When EN is set to logic 1, the
TDPR is enabled and flag sequences are sent until data is written into the
TDPR Transmit Data register. When the EN bit is set to logic 0, the TDPR is
disabled and overwrites the incoming backplane data with an all 1's pattern.
CRC:
The CRC enable bit controls the generation of the CCITT_CRC frame check
sequence (FCS). Setting the CRC bit to logic 1 enables the CCITT-CRC
generator and appends the 16-bit FCS to the end of each message. When
the CRC bit is set to logic 0, the FCS is not appended to the end of the
message. The CRC type used is the CCITT-CRC with generator polynomial
x16 + x12 + x5 + 1. The high order bit of the FCS word is transmitted first. .
CRC FCS is also appended to the performance report data transmitted from
the T1-APRM if CRC is set to logic 1.
ABT:
The Abort (ABT) bit controls the sending of the 7 consecutive ones HDLC
abort code. Setting the ABT bit to a logic 1 causes the 11111110 code (the 0
is transmitted first) to be transmitted after the last byte from the TDPR FIFO is
transmitted. The FIFO is then reset. All data in the FIFO will be lost. Aborts
are continuously sent and the FIFO is held in reset until this bit is reset to a
logic 0. At least one Abort sequence will be sent when the ABT bit transitions
from logic 0 to logic 1. Note that T1-APRM performance report insertion takes
precedence over the ABT register bit. When a performance report frame is
available, the TDPR will transmit 2 flag sequences before, and 1 or 2 flag