
Benets of LVD Link
1-3
Optional 816-byte DMA FIFO supports large block transfers at Ultra2
SCSI speeds. The default FIFO size is 112 bytes.
Thirty-one levels of SCSI Synchronous Offset increases the pace of
synchronous transfers to match Ultra2 SCSI transfer speeds.
On-chip LVD Link transceivers allow increased connectivity, longer
cable length, and improved performance. They also automatically
sense the type of device connected to the SCSI bus and switch as
needed to single-ended, LVD, or high voltage differential mode (if the
chip is connected to external transceivers).
On-chip SCSI clock quadrupler can achieve 160 MHz frequency with
an external 40 MHz oscillator.
Supports Subsystem ID and Subsystem Vendor ID registers in PCI
conguration space.
Support for serial EEPROM interface.
1.2 Benets of LVD Link
The SYM53C895 supports Low Voltage Differential (LVD) for SCSI, a
signaling technology that increases the reliability of SCSI data transfers
over longer distances than supported by Single-Ended (SE) SCSI. The
low current output of LVD allows the I/O transceivers to be integrated
directly onto the chip. LVD provides the reliability of high voltage
differential SCSI without the added cost of external differential
transceivers. Ultra2 SCSI with LVD allows a longer SCSI cable and more
devices on the bus, using the same cables dened in the SCSI-3 Parallel
Interface standard for Ultra SCSI. LVD provides a long-term migration
path to even faster SCSI transfer rates without compromising signal
integrity, cable length, or connectivity.
For backward compatibility to existing SE devices, the SYM53C895
features universal LVD Link transceivers that can switch between LVD
and SE SCSI modes. The LVD Link technology also supports high-power
differential signaling in legacy systems when external transceivers are
connected to the SYM53C895. This allows the SYM53C895 to be used
in both legacy and Ultra2 SCSI applications.