
6-2
SCSI SCRIPTS Instruction Set
6.1 Low-Level Register Interface Mode
With the low-level register interface mode, the user has access to the
DMA control logic and the SCSI bus control logic. An external processor
has access to the SCSI bus signals and the low-level DMA signals, which
allows creation of complicated board level test algorithms. The low-level
interface is useful for backward compatibility with SCSI devices that
require certain unique timings or bus sequences to operate properly.
Another feature allowed at the low-level is loopback testing. In loopback
mode, the SCSI core can be directed to talk to the DMA core to test
internal data paths all the way out to the chip pins.
6.2 High-Level SCSI SCRIPTS Mode
To operate in the SCSI SCRIPTS mode, the SYM53C895 requires only
a SCRIPTS start address. The start address must be at a dword (four
byte) boundary to align all the following SCRIPTS at a dword boundary
since all SCRIPTS are 8 or 12 bytes long. Instructions are fetched until
an interrupt instruction is encountered, or until an unexpected event
(such as a hardware error) causes an interrupt to the external processor.
Once an interrupt is generated, the SYM53C895 halts all operations until
the interrupt is serviced. Then, the start address of the next SCRIPTS
instruction may be written to the DMA SCRIPTS Pointer register to
restart the automatic fetching and execution of instructions.
The SCSI SCRIPTS mode of execution allows the SYM53C895 to make
decisions based on the status of the SCSI bus, which off-loads the
microprocessor from servicing the numerous interrupts inherent in I/O
operations.
Given the rich set of SCSI-oriented features included in the instruction
set, and the ability to re-enter the SCSI algorithm at any point, this high-
level interface is all that is required for both normal and exception
conditions. Switching to low-level mode for error recovery should never
be required.