
5-22
Registers
for multithreaded applications. The ARB[1:0] bits in SCSI
Control Zero (SCNTL0) should be set for full arbitration
and selection before setting this bit.
Arbitration is retried until won. At that point, the
SYM53C895 holds SBSY and SSEL asserted, and waits
for a select or reselect sequence to be requested. The
Immediate Arbitration bit is reset automatically when the
selection or reselection sequence is completed, or times
out.
An unexpected disconnect condition clears IARB without
attempting arbitration. See the SCSI Disconnect
Unexpected bit (SCNTL2, bit 7) for more information on
expected versus unexpected disconnects.
An immediate arbitration sequence can be aborted. First,
the Abort bit in the Interrupt Status (ISTAT) register
should be set. Then one of two things will eventually
happen:
The Won Arbitration bit (SSTAT0 bit 2) is set. In this
case, the Immediate Arbitration bit needs to be reset.
This completes the abort sequence and disconnects
the SYM53C895 from the SCSI bus. If it is not
acceptable to go to Bus Free phase immediately
following the arbitration phase, a low-level selection
may be performed instead.
The abort completes because the SYM53C895 loses
arbitration. This can be detected by the Immediate
Arbitration bit being cleared. The Lost Arbitration bit
(SSTAT0 bit 3) should not be used to detect this
condition. No further action needs to be taken in this
case.
SST
Start SCSI Transfer
0
This bit is automatically set during SCRIPTS execution
and should not be used. It causes the SCSI core to begin
a SCSI transfer and includes SREQ/SACK handshaking.
The determination of whether the transfer is a send or
receive is made according to the value written to the I/O
bit in the SCSI Output Control Latch (SOCL) register.
This bit is self-clearing. It should not be set for low-level
operation.