- 您现在的位置：买卖IC网 > PDF目录11659 > AD9923ABBCZRL (Analog Devices Inc)IC PROCESSOR CCD 12BIT 105CSPBGA PDF资料下载
参数资料
| 型号： | AD9923ABBCZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 42/84页 |
| 文件大小： | 0K |
| 描述： | IC PROCESSOR CCD 12BIT 105CSPBGA |
| 标准包装： | 2,000 |
| 类型： | CCD 信号处理器，12 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 电流 - 电源： | 20mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 105-LFBGA，CSPBGA |
| 供应商设备封装： | 105-CSPBGA（8x8） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页当前第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页
AD9923A
Rev. A | Page 47 of 84
SUBCK: Suppression
Normally, the SUBCK begins pulsing on the line following the
sensor gate line (VSG). Some CCDs require suppressing the
SUBCK pulse for one or more lines following the VSG line. The
SUBCKSUPPRESS register enables such suppression.
Readout After Exposure
After the exposure, the readout of the CCD data occurs, beginning
with the sensor gate (VSG) operation. By default, the AD9923A
generates VSG pulses in every field. When only a single exposure
and readout frame are needed, as is the case in the CCD preview
mode, the VSG and SUBCK pulses can operate in every field.
However, often during readout, the SUBCK output must be
suppressed until the readout is complete. The READOUTNUM
register specifies the number of additional fields after the exposure
to continue the suppression of SUBCK. READOUTNUM can be
programmed for 0 to 7 fields, and should be preprogrammed at
startup, not at the same time as the exposure write. A typical
interlaced CCD frame readout mode generally requires two fields
of SUBCK suppression (READOUTNUM = 2) during readout.
A three-field, six-phase CCD requires three fields of SUBCK
suppression after the readout begins (READOUTNUM = 3).
If SUBCK output is required to initiate backup during the last field
of readout, program the READOUTNUM register to one less
than the total number of CCD readout fields. Similar to the
exposure operation, the readout operation must be triggered
using the TRIGGER register.
SUBCK: Additional Masking
The SUBCKMASK register (Address 0x65) allows more complex
SUBCK masking. If SUBCKMASK = 1, it starts masking the
SUBCK at the next VD edge. If SUBCKMASK = 2, it enables
users to select the internal SHUT3 signal and create a custom
SUBCK masking pattern that spans several fields.
When generating an exposure by using the TRIGGER register,
as previously described in the Readout After Exposure section,
the AD9923A outputs the SUBCK and VSG signals on every
field by default. This works well for continuous, single field
exposure and readout operations, such as those in the CCD live
preview mode. However, if the CCD requires a longer exposure
time, or if multiple readout fields are needed, the TRIGGER
register is needed to initiate specific exposure and readout
sequences.
Typically, the exposure and readout bits in the TRIGGER register
are used together. This initiates a complete exposure-plus-readout
operation. After the exposure, the readout occurs automatically.
The values in the EXPOSURE and READOUTNUM registers
determine the length of each operation.
It is possible to independently trigger the readout operation
without triggering the exposure operation. This causes the readout
to occur at the next VD, and the SUBCK output is suppressed
according to the value set in the READOUTNUM register.
The TRIGGER register also controls the SHUT and VSUB signals.
Each signal is individually controlled but dependent on the
triggering of the exposure and readout operations. See Figure 71
for a complete example of triggering the exposure and readout
operations.
Alternatively, it is possible to manually control the exposure and
readout operations by carefully updating the SUBCKSUPPRESS
and VSG masking registers upon every VD field. As described in
the following sections, it is possible to have partial or full manual
control of the shutter signals. This allows greater flexibility in
generating custom exposure/readout/shutter signal timing.
相关PDF资料 |
PDF描述 |
|---|---|
| 1-413589-1 | CONN PLUG BNC JIS 3C-2V CRIMP AU |
| 8-5227079-1 | CONN PLUG BNC CRIMP DUAL |
| 2081204-1 | CONN JACK SMA BULKHEAD RG402 |
| MS3102R36-18S | CONN RCPT 31POS BOX MNT W/SCKT |
| AD8497CRMZ-R7 | IC THERMOCOUPLE A W/COMP 8MSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9923BBCZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9923BBCZRL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9924BBCZ | 制造商:Analog Devices 功能描述: |
| AD9924BBCZRL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9925 | 制造商:AD 制造商全称:Analog Devices 功能描述:CCD Signal Processor with Vertical Driver and Precision Timing Generator |
发布紧急采购，3分钟左右您将得到回复。