AD9923A
Rev. A | Page 66 of 84
LAYOUT OF INTERNAL REGISTERS
The AD9923A address space is divided into two register areas,
as illustrated in
Figure 86. In the first area, Address 0x00 to
Address 0x91 contain the registers for the AFE, miscellaneous
functions, VD/HD parameters, timing core, CLPOB masking,
SG patterns, shutter functions, and memory configuration. The
second area of the address space, beginning at Address 0x400,
consists of the registers for the V-pattern groups, V-sequences,
and fields. This is a configurable set of registers; the user can
decide how many V-pattern groups, V-sequences, and fields are
used in a particular design. Therefore, the addresses for these
registers vary, depending on the number of V-patterns and
V-sequences chosen.
Register 0x90 (VPAT_NUM) and Register 0x91 (VSEQ_NUM)
specify the total number of V-pattern groups and V-sequences
used. The starting address for the V-pattern groups is 0x400.
The starting address for a V-sequence is based on the number
of V-pattern groups used, with each V-pattern group occupying
40 register addresses. The starting address for a field register
depends on both the number of V-pattern groups and the
number of V-sequences. Each V-sequence occupies 20 register
addresses, and each field occupies 12 register addresses.
The starting address for a V-sequence is equal to 0x400 plus the
number of V-pattern groups times 40. The starting address for a
field is equal to the starting address of a V-sequence plus the
number of V-sequences times 20. The VPAT, VSEQ, and field
registers must occupy a continuous block of addresses.
Figure 87 shows an example with three V-pattern groups, four
V-sequences, and two fields. The starting address for the V-pattern
groups is 0x400. Because VPAT_NUM = 3, the V-pattern groups
occupy 120 address locations. The start of the V-sequence register
is 0x400 + 120 = 0x478. With VSEQ_NUM = 3, the V-sequences
occupy 60 address locations. Therefore, the field registers begin at
0x448 + 60 = 0x4B4.
The AD9923A address space contains many unused addresses.
Undefined addresses between Address 0x00 and Address 0x399
should not be written to, or the AD9923A might operate
incorrectly. Continuous register writes should be performed
carefully to avoid writing to undefined registers.
FIXED REGISTER AREA
ADDR 0x00
ADDR 0x90
ADDR 0x10
ADDR 0x20
ADDR 0x30
ADDR 0x40
ADDR 0x50
ADDR 0x60
V-PATTERN GROUPS
(EACH GROUP USES 40 REGISTERS)
V-SEQUENCES
(EACH VSEQ USES 20 REGISTERS)
CONFIGURABLE REGISTER DATA
ADDR 0x400
FIELDS
(EACH FIELD USES 12 REGISTERS)
MAX 0x7FF
VSEQ START
FIELD START
ADDR 0xFF
ADDR 0x92
AFE REGISTERS
CONFIGURE MEMORY USING
VPAT_NUM AND VSEQ_NUM
MISCELLANEOUS REGISTERS
VD/HD REGISTERS
TIMING CORE REGISTERS
CLPOB MASK REGISTERS
SG PATTERN REGISTERS
SHUTTER CONTROL REGISTERS
INVALID DO NOT ACCESS
0
55
86
-08
3
Figure 86. Layout of AD9923A Registers
ADDR 0x400
ADDR 0x478
ADDR 0x4B4
ADDR 0x4CC
MAX 0x7FF
3 V-PATTERN GROUPS
(40 × 3 = 120 REGISTERS)
4 V-SEQUENCES
(20 × 3 = 60 REGISTERS)
2 FIELDS
(12 × 2 = 24 REGISTERS)
UNUSED MEMORY
05
58
6-
0
84
Figure 87. Example of Register Configuration