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| 型号： | AD9923ABBCZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 48/84页 |
| 文件大小： | 0K |
| 描述： | IC PROCESSOR CCD 12BIT 105CSPBGA |
| 标准包装： | 2,000 |
| 类型： | CCD 信号处理器，12 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 电流 - 电源： | 20mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 105-LFBGA，CSPBGA |
| 供应商设备封装： | 105-CSPBGA（8x8） |
| 包装： | 带卷 (TR) |
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AD9923A
Rev. A | Page 52 of 84
Register
Length (Bits)
Range
Description
SHUT_MAN
1
Enable/disable
Enables SHUT manual control mode.
0 = disable.
1 = enable.
SHUT_ON_FD
12
0 to 4095 field location
Field location to switch on MSHUT. Inactive, or closed.
SHUT_ON_LN
12
0 to 4095 line location
Line position to switch on MSHUT. Inactive, or closed.
SHUT_ON_PX
13
0 to 8191 pixel location
Pixel position to switch on MSHUT. Inactive, or closed.
SHUT_OFF_FD
12
0 to 4095 field location
Field location to switch off MSHUT. Inactive, or closed.
SHUT_OFF_LN
12
0 to 4095 line location
Line position to switch off MSHUT. Inactive, or closed.
SHUT_OFF_PX
13
0 to 8191 pixel location
Pixel position to switch off MSHUT. Inactive, or closed.
Explanation of Figure 71
The numbers in this section, Explanation of Figure 71,
correspond precisely to the numbers embedded in Figure 71.
1.
Write to the READOUTNUM register (Address 0x62) to
specify the number of fields to suppress SUBCK during
readout of CCD data. In this example, READOUTNUM = 3.
Write to the EXPOSURENUM register (Address 0x63) to
specify the number of fields to suppress SUBCK and VSG out-
puts during exposure. In this example, EXPOSURENUM = 1.
Write to the TRIGGER register (Address 0x61) to trigger
the SHUT0 (STROBE), SHUT1 (MSHUT), and VSUB0
(VSUB) signals, and to start the exposure-plus-readout
operation. To trigger these events (see Figure 71), set the
register TRIGGER = 0xD3. Readout automatically occurs
after the exposure period finishes.
Write to the MODE register to configure the next five
fields. The first two fields during exposure are the same as
the current draft mode fields, and the next three fields are
the still frame readout fields. The register settings for the
draft mode field and the three readout fields are previously
programmed.
2.
VD/HD falling edge updates the serial writes from 1.
3.
If VSUB0 MODE = 0 (Address 0x69), VSUB output
turns on at the line specified in the VSUB0_ON
register (Address 0x6A).
4.
STROBE output turns on and off at the location specified
in the SHUT0_ON/SHUT0_OFF registers (Address 0x6D/
Address 0x71).
5.
MSHUT output turns off at the location specified in the
SHUT1_OFF_FD, SHUT1_OFF_LN, and SHUT1_OFF_PX
registers (Address 0x75 and Address 0x76). The SHUT1 on
position is ignored because the SHUT1 signal is already on
from a previous manual operation (see Step 10).
6.
The next VD falling edge automatically starts the first
readout field.
7.
The next VD falling edge automatically starts the second
readout field.
8.
The next VD falling edge automatically starts the third
readout field.
9.
Write to the MODE register to reconfigure the single draft
mode field timing.
Write a 1 to the SHUT1_MAN and SHUT1_ON registers
(Address 0x72) to turn the MSHUT output back manually.
10. VD/HD falling edge updates the serial writes from 9. VSG
outputs return to draft mode timing. SUBCK output
resumes operation.
MSHUT output returns to the on position (active or open).
Be sure to disable manual control of SHUT1 before another
automatic trigger of the SHUT1 signal is needed.
VSUB output returns to the off position (inactive).
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9923BBCZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9923BBCZRL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9924BBCZ | 制造商:Analog Devices 功能描述: |
| AD9924BBCZRL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9925 | 制造商:AD 制造商全称:Analog Devices 功能描述:CCD Signal Processor with Vertical Driver and Precision Timing Generator |
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