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| 型号： | AD9923ABBCZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 50/84页 |
| 文件大小： | 0K |
| 描述： | IC PROCESSOR CCD 12BIT 105CSPBGA |
| 标准包装： | 2,000 |
| 类型： | CCD 信号处理器，12 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 电流 - 电源： | 20mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 105-LFBGA，CSPBGA |
| 供应商设备封装： | 105-CSPBGA（8x8） |
| 包装： | 带卷 (TR) |
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AD9923A
Rev. A | Page 54 of 84
FG_TRIG OPERATION
The AD9923A contains one additional signal that can be used
in conjunction with shutter operation or general system
operation. The FG_TRIG signal is an internally generated pulse
that can be output on the SYNC pins for shutter or other system
functions. A unique feature of the FG_TRIG signal is that it is
output with respect to the MODE register field status.
The FG_TRIG signal is generated using the SHUT1 start
polarity and toggle position registers, programmable with line
and pixel resolution. The field registers for SHUT1 are ignored
because the field placement of the FG_TRIG pulse is matched
to the field count specified by the MODE register operation.
The FG_TRIGEN register contains a three-bit value that specifies
which field count contains the FG_TRIG pulse. Figure 72 shows
how the FG_TRIG pulse is generated using these registers.
After the FG_TRIG signal is specified, it can be enabled using
Bit 3 of the FG_TRIGEN register. The FG_TRIG signal is
mapped to the SYNC output if the SYNC pin is configured as
an output (SYNCENABLE = 0).
Table 41. FG_TRIG Operation Registers
Register
Address
Bit Location
Description
SYNCENABLE
0x12
[0]
0 = configures SYNC pin as an output. By default, the FG_TRIG signal is output on the SYNC pin.
1 = SYNC pin is an external synchronization input.
FG_TRIGEN
0xF1
[3:0]
[2:0] selects the field count for the pulse based on the mode field counter.
[3] = 1 to enable FG_TRIG signal output.
SHUT1POL
0x72
[1]
[1] FG_TRIG start polarity.
SHUT1_ON_LN
0x74
[11:0]
FG_TRIG first toggle, line location.
SHUT1_ON_PX
0x74
[25:13]
FG_TRIG first toggle, pixel location.
SHUT1_OFF_LN
0x76
[11:0]
FG_TRIG second toggle, line location.
SHUT1_OFF_PX
0x76
[25:13]
FG_TRIG second toggle, pixel location.
VD
FG_TRIG PROGRAMMABLE SETTINGS:
1ACTIVE POLARITY.
2FIRST TOGGLE POSITION, LINE AND PIXEL LOCATION.
3SECOND TOGGLE POSITION, LINE AND PIXEL LOCATION.
4FIELD PLACEMENT BASED ON MODE REGISTER FIELD COUNT.
MODE REGISTER
FIELD COUNT
FG_TRIG 1
23
FIELD 0
FIELD 1
FIELD 2
FIELD 0
FIELD 1
44
55
86
-07
0
Figure 72. FG_TRIG Signal Generation
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相关代理商/技术参数 |
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|---|---|
| AD9923BBCZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9923BBCZRL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9924BBCZ | 制造商:Analog Devices 功能描述: |
| AD9924BBCZRL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9925 | 制造商:AD 制造商全称:Analog Devices 功能描述:CCD Signal Processor with Vertical Driver and Precision Timing Generator |
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