参数资料
| 型号： | IP-SDRAM/DDR2 |
| 厂商： | Altera |
| 文件页数： | 10/106页 |
| 文件大小： | 0K |
| 描述： | IP DDR2 SDRAM CONTROLLER |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | DDR2 SDRAM 控制器 |
| 许可证： | 初始许可证 |
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1–6
Chapter 1: About This Compiler
Installation and Licensing
Controller Compiler, where < path > is the installation directory. The default
installation directory on Windows is c:\altera <version> ; on Linux it is
/opt/altera <version> .
Figure 1–2. Directory Structure
<path>
Installation directory.
ip
Contains the Altera MegaCore IP Library and third-party IP cores.
altera
Contains the Altera MegaCore IP Library.
common
Contains shared components.
ddr_ddr2_sdram
Contains the DDR and DDR2 SDRAM Controller Compiler files and documentation.
constraints
Contains scripts that generate an instance-specific Tcl script for each instance of the DDR and DDR2
SDRAM Controller Compiler in various Altera devices.
dat
Contains a data file for each Altera device combination that is used by the Tcl script to generate the
instance-specific Tcl script.
doc
Contains the documentation for the DDR and DDR2 SDRAM Controller Compiler.
lib
Contains encrypted lower-level design files and other support files.
system_timing
Contains system timing analysis scripts and associated files.
OpenCore Plus Evaluation
With Altera’s free OpenCore Plus evaluation feature, you can perform the following
actions:
■
■
■
■
Simulate the behavior of a megafunction (Altera MegaCore function or AMPP SM
megafunction) within your system
Verify the functionality of your design, as well as evaluate its size and speed
quickly and easily
Generate time-limited device programming files for designs that include
MegaCore functions
Program a device and verify your design in hardware
You only need to purchase a license for the megafunction when you are completely
satisfied with its functionality and performance, and want to take your design to
production.
f
For more information on OpenCore Plus hardware evaluation using the DDR and
March 2009 Altera Corporation
相关PDF资料 |
PDF描述 |
|---|---|
| IP-SLITE2 | IP SERIALLITE II |
| IP-SRAM/QDRII | IP QDRII SRAM CONTROLLER |
| IP-VITERBI/SS | IP VITERBI LOW-SPEED |
| IP4220CZ6,125 | IC USB DUAL ESD PROTECT 6TSOP |
| IPA-66-1-600-10.0-A-01-T | CIRC BRKR 10A 2POLE SCREW TERM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPSE.4.33SM600 | 制造商:Banner Engineering 功能描述:FIBER IPSE.4.33SM600 GLASS FIBER (MIN ORDER 50) |
| IPSE.4.62SM600 | 制造商:Banner Engineering 功能描述:FIBER IPSE.4.62SM600 GLASS FIBER (MIN ORDER 50) |
| IPS-EMBEDDED | 功能描述:开发软件 Embedded IP Suite MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPS-EVAL-EH-01 | 功能描述:ENERGY HARVESTING BOARD RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:THINERGY® 标准包装:1 系列:- 主要目的:数字电位器 嵌入式:- 已用 IC / 零件:AD5258 主要属性:- 次要属性:- 已供物品:板 相关产品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP |
| IPS-EVAL-EH-02 | 制造商:Infinite Power Solutions 功能描述:BOARD EVAL WIRELESS SENSING |
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