参数资料
| 型号： | IP-SDRAM/DDR2 |
| 厂商： | Altera |
| 文件页数： | 21/106页 |
| 文件大小： | 0K |
| 描述： | IP DDR2 SDRAM CONTROLLER |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | DDR2 SDRAM 控制器 |
| 许可证： | 初始许可证 |
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Chapter 2: Getting Started
2–11
MegaWizard Plug-In Manager Design Flow
Launch IP Toolbench from the MegaWizard Plug-In Manager
To launch the wizard in the Quartus II software, follow these steps:
1. Start the MegaWizard Plug-In Manager by choosing the MegaWizard Plug-In
Manager command (Tools menu). The MegaWizard Plug-In Manager dialog box
displays.
1
Refer to Quartus II Help for more information on how to use the
MegaWizard Plug-In Manager.
2. Specify that you want to create a new custom megafunction variation and click
Next .
3. Expand the Interfaces > Memory Controllers directory, then click either DDR
SDRAM Controller v9.0 or DDR2 SDRAM Controller v9.0 .
4. Select the output file type for your design; the wizard supports VHDL and Verilog
HDL.
5. The MegaWizard Plug-In Manager shows the project path that you specified in the
New Project Wizard . Append a variation name for the MegaCore function output
files < project path >\< variation name >.
1
The < variation name > must be a different name from the project name and
the top-level design entity name.
6. Click Next to launch IP Toolbench.
Parameterize
To parameterize your MegaCore function, follow these steps:
f
1. Click Step 1: Parameterize in IP Toolbench.
2. In the Presets list, click a specific memory device, Altera development board, or
click Custom .
1
You can add your own memory devices to this list by editing the
memory_types.dat file in the \constraints directory.
3. Enter a Clock Speed in MHz. For example 200.0 . The constraints script, timing
analysis, and the datapath use this clock speed. It must be set to the value that you
intend to use. The first time you use the DDR SDRAM controller IP Toolbench or if
you turn on Automatically generate the PLL , it uses this value for the IP
4. Choose the memory parameters.
a. Choose your memory interface parameters.
b. Choose the memory properties.
c. Select either Registered DIMM or Unbuffered memory .
? March 2009
Altera Corporation
相关PDF资料 |
PDF描述 |
|---|---|
| IP-SLITE2 | IP SERIALLITE II |
| IP-SRAM/QDRII | IP QDRII SRAM CONTROLLER |
| IP-VITERBI/SS | IP VITERBI LOW-SPEED |
| IP4220CZ6,125 | IC USB DUAL ESD PROTECT 6TSOP |
| IPA-66-1-600-10.0-A-01-T | CIRC BRKR 10A 2POLE SCREW TERM |
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参数描述 |
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| IPS-EMBEDDED | 功能描述:开发软件 Embedded IP Suite MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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