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参数资料
| 型号： | PI7C8154BNAE |
| 厂商： | Pericom |
| 文件页数： | 41/114页 |
| 文件大小： | 0K |
| 描述： | IC PCI-PCI BRIDGE ASYNC 304-PBGA |
| 标准包装： | 27 |
| 系列： | * |
| 应用： | * |
| 接口： | * |
| 电源电压： | * |
| 封装/外壳： | 304-BBGA |
| 供应商设备封装： | 304-PBGA（31x31） |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
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PI7C8154B
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
Advance Information
Page 32 of 112
JUNE 2008 REVISION 1.1
Type 1 configuration transactions are issued when the intended target resides on another PCI bus,
or when a special cycle is to be generated on another PCI bus. A Type 1 configuration command is
identified by the configuration command and the lowest two address bits set to 01b.
The register number is found in both Type 0 and Type 1 formats and gives the DWORD address of
the configuration register to be accessed. The function number is also included in both Type 0 and
Type 1 formats and indicates which function of a multifunction device is to be accessed. For
single-function devices, this value is not decoded. The addresses of Type 1 configuration
transaction include a 5-bit field designating the device number that identifies the device on the
target PCI bus that is to be accessed. In addition, the bus number in Type 1 transactions specifies
the PCI bus to which the transaction is targeted.
2.8.1
TYPE 0 ACCESS TO PI7C8154A
The configuration space is accessed by a Type 0 configuration transaction on the primary interface.
The configuration space cannot be accessed from the secondary bus. The PI7C8154B responds to a
Type 0 configuration transaction by asserting P_DEVSEL# when the following conditions are met
during the address phase:
The bus command is a configuration read or configuration write transaction.
Lowest two address bits P_AD[1:0] must be 00b.
Signal P_IDSEL must be asserted.
PI7C8154B limits all configuration access to a single DWORD data transfer and returns target-
disconnect with the first data transfer if additional data phases are requested. Because read
transactions to configuration space do not have side effects, all bytes in the requested DWORD are
returned, regardless of the value of the byte enable bits.
Type 0 configuration write and read transactions do not use data buffers; that is, these transactions
are completed immediately, regardless of the state of the data buffers. The PI7C8154B ignores all
Type 0 transactions initiated on the secondary interface.
2.8.2
TYPE 1 TO TYPE 0 CONFIGURATION
Type 1 configuration transactions are used specifically for device configuration in a hierarchical
PCI bus system. A PCI-to-PCI bridge is the only type of device that should respond to a Type 1
configuration command. Type 1 configuration commands are used when the configuration access is
intended for a PCI device that resides on a PCI bus other than the one where the Type 1 transaction
is generated.
PI7C8154B performs a Type 1 to Type 0 translation when the Type 1 transaction is generated on
the primary bus and is intended for a device attached directly to the secondary bus. PI7C8154B
must convert the configuration command to a Type 0 format so that the secondary bus device can
respond to it. Type 1 to Type 0 translations are performed only in the downstream direction; that is,
PI7C8154B generates a Type 0 transaction only on the secondary bus, and never on the primary
bus.
PI7C8154B responds to a Type 1 configuration transaction and translates it into a Type 0
transaction on the secondary bus when the following conditions are met during the address phase:
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PI7C8154BNAE-80 | 功能描述:外围驱动器与原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| PI7C8154BNAI | 制造商:Pericom Semiconductor Corporation 功能描述: |
| PI7C8154BNAIE | 功能描述:外围驱动器与原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| PI7C8154EVB | 功能描述:界面开发工具 64B/66MHz 2 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| PI7C8154NA-33 | 制造商:PERICOM 功能描述: |
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